13d0407baSopenharmony_ci/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
23d0407baSopenharmony_ci/*
33d0407baSopenharmony_ci * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
43d0407baSopenharmony_ci * Author: Sandy Huang <hjc@rock-chips.com>
53d0407baSopenharmony_ci */
63d0407baSopenharmony_ci
73d0407baSopenharmony_ci#ifndef ROCKCHIP_DRM_DEBUGFS_H
83d0407baSopenharmony_ci#define ROCKCHIP_DRM_DEBUGFS_H
93d0407baSopenharmony_ci
103d0407baSopenharmony_ci/**
113d0407baSopenharmony_ci * struct vop_dump_info - vop dump plane info structure
123d0407baSopenharmony_ci *
133d0407baSopenharmony_ci * Store plane info used to write display data to /data/vop_buf/
143d0407baSopenharmony_ci *
153d0407baSopenharmony_ci */
163d0407baSopenharmony_cistruct vop_dump_info {
173d0407baSopenharmony_ci	/* @win_id: vop hard win index */
183d0407baSopenharmony_ci	u8 win_id;
193d0407baSopenharmony_ci	/* @area_id: vop hard area index inside win */
203d0407baSopenharmony_ci	u8 area_id;
213d0407baSopenharmony_ci	/* @AFBC_flag: indicate the buffer compress by gpu or not */
223d0407baSopenharmony_ci	bool AFBC_flag;
233d0407baSopenharmony_ci	/* @yuv_format: indicate yuv format or not */
243d0407baSopenharmony_ci	bool yuv_format;
253d0407baSopenharmony_ci	/* @pitches: the buffer pitch size */
263d0407baSopenharmony_ci	u32 pitches;
273d0407baSopenharmony_ci	/* @height: the buffer pitch height */
283d0407baSopenharmony_ci	u32 height;
293d0407baSopenharmony_ci	/* @info: DRM format info */
303d0407baSopenharmony_ci	const struct drm_format_info *format;
313d0407baSopenharmony_ci	/* @offset: the buffer offset */
323d0407baSopenharmony_ci	unsigned long offset;
333d0407baSopenharmony_ci	/* @num_pages: the pages number */
343d0407baSopenharmony_ci	unsigned long num_pages;
353d0407baSopenharmony_ci	/* @pages: store the buffer all pages */
363d0407baSopenharmony_ci	struct page **pages;
373d0407baSopenharmony_ci};
383d0407baSopenharmony_ci
393d0407baSopenharmony_ci/**
403d0407baSopenharmony_ci * struct vop_dump_list - store all buffer info per frame
413d0407baSopenharmony_ci *
423d0407baSopenharmony_ci * one frame maybe multiple buffer, all will be stored here.
433d0407baSopenharmony_ci *
443d0407baSopenharmony_ci */
453d0407baSopenharmony_cistruct vop_dump_list {
463d0407baSopenharmony_ci	struct list_head entry;
473d0407baSopenharmony_ci	struct vop_dump_info dump_info;
483d0407baSopenharmony_ci};
493d0407baSopenharmony_ci
503d0407baSopenharmony_cienum vop_dump_status {
513d0407baSopenharmony_ci	DUMP_DISABLE = 0,
523d0407baSopenharmony_ci	DUMP_KEEP
533d0407baSopenharmony_ci};
543d0407baSopenharmony_ci
553d0407baSopenharmony_ci#if defined(CONFIG_ROCKCHIP_DRM_DEBUG)
563d0407baSopenharmony_ciint rockchip_drm_add_dump_buffer(struct drm_crtc *crtc, struct dentry *root);
573d0407baSopenharmony_ciint rockchip_drm_dump_plane_buffer(struct vop_dump_info *dump_info, int frame_count);
583d0407baSopenharmony_ci#else
593d0407baSopenharmony_cistatic inline int
603d0407baSopenharmony_cirockchip_drm_add_dump_buffer(struct drm_crtc *crtc, struct dentry *root)
613d0407baSopenharmony_ci{
623d0407baSopenharmony_ci	return 0;
633d0407baSopenharmony_ci}
643d0407baSopenharmony_ci
653d0407baSopenharmony_cistatic inline int
663d0407baSopenharmony_cirockchip_drm_dump_plane_buffer(struct vop_dump_info *dump_info, int frame_count)
673d0407baSopenharmony_ci{
683d0407baSopenharmony_ci	return 0;
693d0407baSopenharmony_ci}
703d0407baSopenharmony_ci#endif
713d0407baSopenharmony_ci
723d0407baSopenharmony_ci#endif
73