1/* SPDX-License-Identifier: GPL-2.0 */ 2#ifndef _LINUX_DMA_MAPPING_H 3#define _LINUX_DMA_MAPPING_H 4 5#include <linux/sizes.h> 6#include <linux/string.h> 7#include <linux/device.h> 8#include <linux/err.h> 9#include <linux/dma-direction.h> 10#include <linux/scatterlist.h> 11#include <linux/bug.h> 12#include <linux/mem_encrypt.h> 13 14/** 15 * List of possible attributes associated with a DMA mapping. The semantics 16 * of each attribute should be defined in Documentation/core-api/dma-attributes.rst. 17 */ 18 19/* 20 * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping 21 * may be weakly ordered, that is that reads and writes may pass each other. 22 */ 23#define DMA_ATTR_WEAK_ORDERING (1UL << 1) 24/* 25 * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be 26 * buffered to improve performance. 27 */ 28#define DMA_ATTR_WRITE_COMBINE (1UL << 2) 29/* 30 * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel 31 * virtual mapping for the allocated buffer. 32 */ 33#define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4) 34/* 35 * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of 36 * the CPU cache for the given buffer assuming that it has been already 37 * transferred to 'device' domain. 38 */ 39#define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5) 40/* 41 * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer 42 * in physical memory. 43 */ 44#define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6) 45/* 46 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem 47 * that it's probably not worth the time to try to allocate memory to in a way 48 * that gives better TLB efficiency. 49 */ 50#define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7) 51/* 52 * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress 53 * allocation failure reports (similarly to __GFP_NOWARN). 54 */ 55#define DMA_ATTR_NO_WARN (1UL << 8) 56 57/* 58 * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully 59 * accessible at an elevated privilege level (and ideally inaccessible or 60 * at least read-only at lesser-privileged levels). 61 */ 62#define DMA_ATTR_PRIVILEGED (1UL << 9) 63 64/* 65 * DMA_ATTR_SYS_CACHE_ONLY: used to indicate that the buffer should be mapped 66 * with the correct memory attributes so that it can be cached in the system 67 * or last level cache. This is useful for buffers that are being mapped for 68 * devices that are non-coherent, but can use the system cache. 69 */ 70#define DMA_ATTR_SYS_CACHE_ONLY (1UL << 10) 71 72/* 73 * DMA_ATTR_SYS_CACHE_ONLY_NWA: used to indicate that the buffer should be 74 * mapped with the correct memory attributes so that it can be cached in the 75 * system or last level cache, with a no write allocate cache policy. This is 76 * useful for buffers that are being mapped for devices that are non-coherent, 77 * but can use the system cache. 78 */ 79#define DMA_ATTR_SYS_CACHE_ONLY_NWA (1UL << 11) 80 81/* 82 * A dma_addr_t can hold any valid DMA or bus address for the platform. It can 83 * be given to a device to use as a DMA source or target. It is specific to a 84 * given device and there may be a translation between the CPU physical address 85 * space and the bus address space. 86 * 87 * DMA_MAPPING_ERROR is the magic error code if a mapping failed. It should not 88 * be used directly in drivers, but checked for using dma_mapping_error() 89 * instead. 90 */ 91#define DMA_MAPPING_ERROR (~(dma_addr_t)0) 92 93#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL << (n)) - 1)) 94 95#ifdef CONFIG_DMA_API_DEBUG 96void debug_dma_mapping_error(struct device *dev, dma_addr_t dma_addr); 97void debug_dma_map_single(struct device *dev, const void *addr, unsigned long len); 98#else 99static inline void debug_dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 100{ 101} 102static inline void debug_dma_map_single(struct device *dev, const void *addr, unsigned long len) 103{ 104} 105#endif /* CONFIG_DMA_API_DEBUG */ 106 107#ifdef CONFIG_HAS_DMA 108static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 109{ 110 debug_dma_mapping_error(dev, dma_addr); 111 112 if (dma_addr == DMA_MAPPING_ERROR) { 113 return -ENOMEM; 114 } 115 return 0; 116} 117 118dma_addr_t dma_map_page_attrs(struct device *dev, struct page *page, size_t offset, size_t size, 119 enum dma_data_direction dir, unsigned long attrs); 120void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, size_t size, enum dma_data_direction dir, 121 unsigned long attrs); 122int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir, 123 unsigned long attrs); 124void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir, 125 unsigned long attrs); 126dma_addr_t dma_map_resource(struct device *dev, phys_addr_t phys_addr, size_t size, enum dma_data_direction dir, 127 unsigned long attrs); 128void dma_unmap_resource(struct device *dev, dma_addr_t addr, size_t size, enum dma_data_direction dir, 129 unsigned long attrs); 130void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, size_t size, enum dma_data_direction dir); 131void dma_sync_single_for_device(struct device *dev, dma_addr_t addr, size_t size, enum dma_data_direction dir); 132void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction dir); 133void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction dir); 134void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs); 135void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, dma_addr_t dma_handle, unsigned long attrs); 136void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs); 137void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle); 138int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr, size_t size, 139 unsigned long attrs); 140int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr, dma_addr_t dma_addr, size_t size, 141 unsigned long attrs); 142bool dma_can_mmap(struct device *dev); 143int dma_supported(struct device *dev, u64 mask); 144int dma_set_mask(struct device *dev, u64 mask); 145int dma_set_coherent_mask(struct device *dev, u64 mask); 146u64 dma_get_required_mask(struct device *dev); 147size_t dma_max_mapping_size(struct device *dev); 148bool dma_need_sync(struct device *dev, dma_addr_t dma_addr); 149unsigned long dma_get_merge_boundary(struct device *dev); 150#else /* CONFIG_HAS_DMA */ 151static inline dma_addr_t dma_map_page_attrs(struct device *dev, struct page *page, size_t offset, size_t size, 152 enum dma_data_direction dir, unsigned long attrs) 153{ 154 return DMA_MAPPING_ERROR; 155} 156static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, size_t size, enum dma_data_direction dir, 157 unsigned long attrs) 158{ 159} 160static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir, 161 unsigned long attrs) 162{ 163 return 0; 164} 165static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, int nents, 166 enum dma_data_direction dir, unsigned long attrs) 167{ 168} 169static inline dma_addr_t dma_map_resource(struct device *dev, phys_addr_t phys_addr, size_t size, 170 enum dma_data_direction dir, unsigned long attrs) 171{ 172 return DMA_MAPPING_ERROR; 173} 174static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr, size_t size, enum dma_data_direction dir, 175 unsigned long attrs) 176{ 177} 178static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, size_t size, 179 enum dma_data_direction dir) 180{ 181} 182static inline void dma_sync_single_for_device(struct device *dev, dma_addr_t addr, size_t size, 183 enum dma_data_direction dir) 184{ 185} 186static inline void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, 187 enum dma_data_direction dir) 188{ 189} 190static inline void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, 191 enum dma_data_direction dir) 192{ 193} 194static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 195{ 196 return -ENOMEM; 197} 198static inline void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag, 199 unsigned long attrs) 200{ 201 return NULL; 202} 203static void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, dma_addr_t dma_handle, unsigned long attrs) 204{ 205} 206static inline void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp, 207 unsigned long attrs) 208{ 209 return NULL; 210} 211static inline void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle) 212{ 213} 214static inline int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr, 215 size_t size, unsigned long attrs) 216{ 217 return -ENXIO; 218} 219static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr, dma_addr_t dma_addr, 220 size_t size, unsigned long attrs) 221{ 222 return -ENXIO; 223} 224static inline bool dma_can_mmap(struct device *dev) 225{ 226 return false; 227} 228static inline int dma_supported(struct device *dev, u64 mask) 229{ 230 return 0; 231} 232static inline int dma_set_mask(struct device *dev, u64 mask) 233{ 234 return -EIO; 235} 236static inline int dma_set_coherent_mask(struct device *dev, u64 mask) 237{ 238 return -EIO; 239} 240static inline u64 dma_get_required_mask(struct device *dev) 241{ 242 return 0; 243} 244static inline size_t dma_max_mapping_size(struct device *dev) 245{ 246 return 0; 247} 248static inline bool dma_need_sync(struct device *dev, dma_addr_t dma_addr) 249{ 250 return false; 251} 252static inline unsigned long dma_get_merge_boundary(struct device *dev) 253{ 254 return 0; 255} 256#endif /* CONFIG_HAS_DMA */ 257 258struct page *dma_alloc_pages(struct device *dev, size_t size, dma_addr_t *dma_handle, enum dma_data_direction dir, 259 gfp_t gfp); 260void dma_free_pages(struct device *dev, size_t size, struct page *page, dma_addr_t dma_handle, 261 enum dma_data_direction dir); 262void *dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *dma_handle, enum dma_data_direction dir, 263 gfp_t gfp); 264void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle, 265 enum dma_data_direction dir); 266 267static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr, size_t size, enum dma_data_direction dir, 268 unsigned long attrs) 269{ 270 /* DMA must never operate on areas that might be remapped. */ 271 if (dev_WARN_ONCE(dev, is_vmalloc_addr(ptr), "rejecting DMA map of vmalloc memory\n")) { 272 return DMA_MAPPING_ERROR; 273 } 274 debug_dma_map_single(dev, ptr, size); 275 return dma_map_page_attrs(dev, virt_to_page(ptr), offset_in_page(ptr), size, dir, attrs); 276} 277 278static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr, size_t size, enum dma_data_direction dir, 279 unsigned long attrs) 280{ 281 return dma_unmap_page_attrs(dev, addr, size, dir, attrs); 282} 283 284static inline void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t addr, unsigned long offset, size_t size, 285 enum dma_data_direction dir) 286{ 287 return dma_sync_single_for_cpu(dev, addr + offset, size, dir); 288} 289 290static inline void dma_sync_single_range_for_device(struct device *dev, dma_addr_t addr, unsigned long offset, 291 size_t size, enum dma_data_direction dir) 292{ 293 return dma_sync_single_for_device(dev, addr + offset, size, dir); 294} 295 296/** 297 * dma_map_sgtable - Map the given buffer for DMA 298 * @dev: The device for which to perform the DMA operation 299 * @sgt: The sg_table object describing the buffer 300 * @dir: DMA direction 301 * @attrs: Optional DMA attributes for the map operation 302 * 303 * Maps a buffer described by a scatterlist stored in the given sg_table 304 * object for the @dir DMA operation by the @dev device. After success the 305 * ownership for the buffer is transferred to the DMA domain. One has to 306 * call dma_sync_sgtable_for_cpu() or dma_unmap_sgtable() to move the 307 * ownership of the buffer back to the CPU domain before touching the 308 * buffer by the CPU. 309 * 310 * Returns 0 on success or -EINVAL on error during mapping the buffer. 311 */ 312static inline int dma_map_sgtable(struct device *dev, struct sg_table *sgt, enum dma_data_direction dir, 313 unsigned long attrs) 314{ 315 int nents; 316 317 nents = dma_map_sg_attrs(dev, sgt->sgl, sgt->orig_nents, dir, attrs); 318 if (nents <= 0) { 319 return -EINVAL; 320 } 321 sgt->nents = nents; 322 return 0; 323} 324 325/** 326 * dma_unmap_sgtable - Unmap the given buffer for DMA 327 * @dev: The device for which to perform the DMA operation 328 * @sgt: The sg_table object describing the buffer 329 * @dir: DMA direction 330 * @attrs: Optional DMA attributes for the unmap operation 331 * 332 * Unmaps a buffer described by a scatterlist stored in the given sg_table 333 * object for the @dir DMA operation by the @dev device. After this function 334 * the ownership of the buffer is transferred back to the CPU domain. 335 */ 336static inline void dma_unmap_sgtable(struct device *dev, struct sg_table *sgt, enum dma_data_direction dir, 337 unsigned long attrs) 338{ 339 dma_unmap_sg_attrs(dev, sgt->sgl, sgt->orig_nents, dir, attrs); 340} 341 342/** 343 * dma_sync_sgtable_for_cpu - Synchronize the given buffer for CPU access 344 * @dev: The device for which to perform the DMA operation 345 * @sgt: The sg_table object describing the buffer 346 * @dir: DMA direction 347 * 348 * Performs the needed cache synchronization and moves the ownership of the 349 * buffer back to the CPU domain, so it is safe to perform any access to it 350 * by the CPU. Before doing any further DMA operations, one has to transfer 351 * the ownership of the buffer back to the DMA domain by calling the 352 * dma_sync_sgtable_for_device(). 353 */ 354static inline void dma_sync_sgtable_for_cpu(struct device *dev, struct sg_table *sgt, enum dma_data_direction dir) 355{ 356 dma_sync_sg_for_cpu(dev, sgt->sgl, sgt->orig_nents, dir); 357} 358 359/** 360 * dma_sync_sgtable_for_device - Synchronize the given buffer for DMA 361 * @dev: The device for which to perform the DMA operation 362 * @sgt: The sg_table object describing the buffer 363 * @dir: DMA direction 364 * 365 * Performs the needed cache synchronization and moves the ownership of the 366 * buffer back to the DMA domain, so it is safe to perform the DMA operation. 367 * Once finished, one has to call dma_sync_sgtable_for_cpu() or 368 * dma_unmap_sgtable(). 369 */ 370static inline void dma_sync_sgtable_for_device(struct device *dev, struct sg_table *sgt, enum dma_data_direction dir) 371{ 372 dma_sync_sg_for_device(dev, sgt->sgl, sgt->orig_nents, dir); 373} 374 375#define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0) 376#define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0) 377#define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0) 378#define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0) 379#define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0) 380#define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0) 381#define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0) 382#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0) 383 384static inline void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp) 385{ 386 return dma_alloc_attrs(dev, size, dma_handle, gfp, (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); 387} 388 389static inline void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t dma_handle) 390{ 391 return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0); 392} 393 394static inline u64 dma_get_mask(struct device *dev) 395{ 396 if (dev->dma_mask && *dev->dma_mask) { 397 return *dev->dma_mask; 398 } 399 return DMA_BIT_MASK(32); 400} 401 402/* 403 * Set both the DMA mask and the coherent DMA mask to the same thing. 404 * Note that we don't check the return value from dma_set_coherent_mask() 405 * as the DMA API guarantees that the coherent DMA mask can be set to 406 * the same or smaller than the streaming DMA mask. 407 */ 408static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask) 409{ 410 int rc = dma_set_mask(dev, mask); 411 if (rc == 0) { 412 dma_set_coherent_mask(dev, mask); 413 } 414 return rc; 415} 416 417/* 418 * Similar to the above, except it deals with the case where the device 419 * does not have dev->dma_mask appropriately setup. 420 */ 421static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask) 422{ 423 dev->dma_mask = &dev->coherent_dma_mask; 424 return dma_set_mask_and_coherent(dev, mask); 425} 426 427/** 428 * dma_addressing_limited - return if the device is addressing limited 429 * @dev: device to check 430 * 431 * Return %true if the devices DMA mask is too small to address all memory in 432 * the system, else %false. Lack of addressing bits is the prime reason for 433 * bounce buffering, but might not be the only one. 434 */ 435static inline bool dma_addressing_limited(struct device *dev) 436{ 437 return min_not_zero(dma_get_mask(dev), dev->bus_dma_limit) < dma_get_required_mask(dev); 438} 439 440static inline unsigned int dma_get_max_seg_size(struct device *dev) 441{ 442 if (dev->dma_parms && dev->dma_parms->max_segment_size) { 443 return dev->dma_parms->max_segment_size; 444 } 445 return SZ_64K; 446} 447 448static inline int dma_set_max_seg_size(struct device *dev, unsigned int size) 449{ 450 if (dev->dma_parms) { 451 dev->dma_parms->max_segment_size = size; 452 return 0; 453 } 454 return -EIO; 455} 456 457static inline unsigned long dma_get_seg_boundary(struct device *dev) 458{ 459 if (dev->dma_parms && dev->dma_parms->segment_boundary_mask) { 460 return dev->dma_parms->segment_boundary_mask; 461 } 462 return ULONG_MAX; 463} 464 465/** 466 * dma_get_seg_boundary_nr_pages - return the segment boundary in "page" units 467 * @dev: device to guery the boundary for 468 * @page_shift: ilog() of the IOMMU page size 469 * 470 * Return the segment boundary in IOMMU page units (which may be different from 471 * the CPU page size) for the passed in device. 472 * 473 * If @dev is NULL a boundary of U32_MAX is assumed, this case is just for 474 * non-DMA API callers. 475 */ 476static inline unsigned long dma_get_seg_boundary_nr_pages(struct device *dev, unsigned int page_shift) 477{ 478 if (!dev) { 479 return (U32_MAX >> page_shift) + 1; 480 } 481 return (dma_get_seg_boundary(dev) >> page_shift) + 1; 482} 483 484static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) 485{ 486 if (dev->dma_parms) { 487 dev->dma_parms->segment_boundary_mask = mask; 488 return 0; 489 } 490 return -EIO; 491} 492 493static inline unsigned int dma_get_min_align_mask(struct device *dev) 494{ 495 if (dev->dma_parms) { 496 return dev->dma_parms->min_align_mask; 497 } 498 return 0; 499} 500 501static inline int dma_set_min_align_mask(struct device *dev, unsigned int min_align_mask) 502{ 503 if (WARN_ON_ONCE(!dev->dma_parms)) { 504 return -EIO; 505 } 506 dev->dma_parms->min_align_mask = min_align_mask; 507 return 0; 508} 509 510static inline int dma_get_cache_alignment(void) 511{ 512#ifdef ARCH_DMA_MINALIGN 513 return ARCH_DMA_MINALIGN; 514#endif 515 return 1; 516} 517 518static inline void *dmam_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp) 519{ 520 return dmam_alloc_attrs(dev, size, dma_handle, gfp, (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); 521} 522 523static inline void *dma_alloc_wc(struct device *dev, size_t size, dma_addr_t *dma_addr, gfp_t gfp) 524{ 525 unsigned long attrs = DMA_ATTR_WRITE_COMBINE; 526 527 if (gfp & __GFP_NOWARN) { 528 attrs |= DMA_ATTR_NO_WARN; 529 } 530 531 return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs); 532} 533 534static inline void dma_free_wc(struct device *dev, size_t size, void *cpu_addr, dma_addr_t dma_addr) 535{ 536 return dma_free_attrs(dev, size, cpu_addr, dma_addr, DMA_ATTR_WRITE_COMBINE); 537} 538 539static inline int dma_mmap_wc(struct device *dev, struct vm_area_struct *vma, void *cpu_addr, dma_addr_t dma_addr, 540 size_t size) 541{ 542 return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, DMA_ATTR_WRITE_COMBINE); 543} 544 545#ifdef CONFIG_NEED_DMA_MAP_STATE 546#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME 547#define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME 548#define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) 549#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) 550#define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) 551#define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) 552#else 553#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) 554#define DEFINE_DMA_UNMAP_LEN(LEN_NAME) 555#define dma_unmap_addr(PTR, ADDR_NAME) (0) 556#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) \ 557 do { \ 558 } while (0) 559#define dma_unmap_len(PTR, LEN_NAME) (0) 560#define dma_unmap_len_set(PTR, LEN_NAME, VAL) \ 561 do { \ 562 } while (0) 563#endif 564 565/* 566 * Legacy interface to set up the dma offset map. Drivers really should not 567 * actually use it, but we have a few legacy cases left. 568 */ 569int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start, dma_addr_t dma_start, u64 size); 570 571extern const struct dma_map_ops dma_virt_ops; 572 573#endif /* _LINUX_DMA_MAPPING_H */ 574