1/* 2 * 3 * Copyright (C) 2017 ROCKCHIP, Inc. 4 * 5 * This software is licensed under the terms of the GNU General Public 6 * License version 2, as published by the Free Software Foundation, and 7 * may be copied, distributed, and modified under those terms. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 */ 15 16#ifndef _DT_BINDINGS_CLOCK_ROCKCHIP_DDR_H 17#define _DT_BINDINGS_CLOCK_ROCKCHIP_DDR_H 18 19#define DDR2_DEFAULT (0) 20 21#define DDR3_800D (0) /* 5-5-5 */ 22#define DDR3_800E (1) /* 6-6-6 */ 23#define DDR3_1066E (2) /* 6-6-6 */ 24#define DDR3_1066F (3) /* 7-7-7 */ 25#define DDR3_1066G (4) /* 8-8-8 */ 26#define DDR3_1333F (5) /* 7-7-7 */ 27#define DDR3_1333G (6) /* 8-8-8 */ 28#define DDR3_1333H (7) /* 9-9-9 */ 29#define DDR3_1333J (8) /* 10-10-10 */ 30#define DDR3_1600G (9) /* 8-8-8 */ 31#define DDR3_1600H (10) /* 9-9-9 */ 32#define DDR3_1600J (11) /* 10-10-10 */ 33#define DDR3_1600K (12) /* 11-11-11 */ 34#define DDR3_1866J (13) /* 10-10-10 */ 35#define DDR3_1866K (14) /* 11-11-11 */ 36#define DDR3_1866L (15) /* 12-12-12 */ 37#define DDR3_1866M (16) /* 13-13-13 */ 38#define DDR3_2133K (17) /* 11-11-11 */ 39#define DDR3_2133L (18) /* 12-12-12 */ 40#define DDR3_2133M (19) /* 13-13-13 */ 41#define DDR3_2133N (20) /* 14-14-14 */ 42#define DDR3_DEFAULT (21) 43#define DDR_DDR2 (22) 44#define DDR_LPDDR (23) 45#define DDR_LPDDR2 (24) 46 47#define DDR4_1600J (0) /* 10-10-10 */ 48#define DDR4_1600K (1) /* 11-11-11 */ 49#define DDR4_1600L (2) /* 12-12-12 */ 50#define DDR4_1866L (3) /* 12-12-12 */ 51#define DDR4_1866M (4) /* 13-13-13 */ 52#define DDR4_1866N (5) /* 14-14-14 */ 53#define DDR4_2133N (6) /* 14-14-14 */ 54#define DDR4_2133P (7) /* 15-15-15 */ 55#define DDR4_2133R (8) /* 16-16-16 */ 56#define DDR4_2400P (9) /* 15-15-15 */ 57#define DDR4_2400R (10) /* 16-16-16 */ 58#define DDR4_2400U (11) /* 18-18-18 */ 59#define DDR4_DEFAULT (12) 60 61#define PAUSE_CPU_STACK_SIZE 16 62 63#endif 64