13d0407baSopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only 23d0407baSopenharmony_cimenu "IRQ chip support" 33d0407baSopenharmony_ci 43d0407baSopenharmony_ciconfig IRQCHIP 53d0407baSopenharmony_ci def_bool y 63d0407baSopenharmony_ci depends on OF_IRQ 73d0407baSopenharmony_ci 83d0407baSopenharmony_ciconfig ARM_GIC 93d0407baSopenharmony_ci bool 103d0407baSopenharmony_ci select IRQ_DOMAIN_HIERARCHY 113d0407baSopenharmony_ci select GENERIC_IRQ_MULTI_HANDLER 123d0407baSopenharmony_ci select GENERIC_IRQ_EFFECTIVE_AFF_MASK 133d0407baSopenharmony_ci 143d0407baSopenharmony_ciconfig ARM_GIC_PM 153d0407baSopenharmony_ci bool 163d0407baSopenharmony_ci depends on PM 173d0407baSopenharmony_ci select ARM_GIC 183d0407baSopenharmony_ci 193d0407baSopenharmony_ciconfig ARM_GIC_MAX_NR 203d0407baSopenharmony_ci int 213d0407baSopenharmony_ci depends on ARM_GIC 223d0407baSopenharmony_ci default 2 if ARCH_REALVIEW 233d0407baSopenharmony_ci default 1 243d0407baSopenharmony_ci 253d0407baSopenharmony_ciconfig ARM_GIC_V2M 263d0407baSopenharmony_ci bool 273d0407baSopenharmony_ci depends on PCI 283d0407baSopenharmony_ci select ARM_GIC 293d0407baSopenharmony_ci select PCI_MSI 303d0407baSopenharmony_ci 313d0407baSopenharmony_ciconfig GIC_NON_BANKED 323d0407baSopenharmony_ci bool 333d0407baSopenharmony_ci 343d0407baSopenharmony_ciconfig ARM_GIC_V3 353d0407baSopenharmony_ci bool 363d0407baSopenharmony_ci select GENERIC_IRQ_MULTI_HANDLER 373d0407baSopenharmony_ci select IRQ_DOMAIN_HIERARCHY 383d0407baSopenharmony_ci select PARTITION_PERCPU 393d0407baSopenharmony_ci select GENERIC_IRQ_EFFECTIVE_AFF_MASK 403d0407baSopenharmony_ci 413d0407baSopenharmony_ciconfig ARM_GIC_V3_ITS 423d0407baSopenharmony_ci bool 433d0407baSopenharmony_ci select GENERIC_MSI_IRQ_DOMAIN 443d0407baSopenharmony_ci default ARM_GIC_V3 453d0407baSopenharmony_ci 463d0407baSopenharmony_ciconfig ARM_GIC_V3_ITS_PCI 473d0407baSopenharmony_ci bool 483d0407baSopenharmony_ci depends on ARM_GIC_V3_ITS 493d0407baSopenharmony_ci depends on PCI 503d0407baSopenharmony_ci depends on PCI_MSI 513d0407baSopenharmony_ci default ARM_GIC_V3_ITS 523d0407baSopenharmony_ci 533d0407baSopenharmony_ciconfig ARM_GIC_V3_ITS_FSL_MC 543d0407baSopenharmony_ci bool 553d0407baSopenharmony_ci depends on ARM_GIC_V3_ITS 563d0407baSopenharmony_ci depends on FSL_MC_BUS 573d0407baSopenharmony_ci default ARM_GIC_V3_ITS 583d0407baSopenharmony_ci 593d0407baSopenharmony_ciconfig ARM_NVIC 603d0407baSopenharmony_ci bool 613d0407baSopenharmony_ci select IRQ_DOMAIN_HIERARCHY 623d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 633d0407baSopenharmony_ci 643d0407baSopenharmony_ciconfig ARM_VIC 653d0407baSopenharmony_ci bool 663d0407baSopenharmony_ci select IRQ_DOMAIN 673d0407baSopenharmony_ci select GENERIC_IRQ_MULTI_HANDLER 683d0407baSopenharmony_ci 693d0407baSopenharmony_ciconfig ARM_VIC_NR 703d0407baSopenharmony_ci int 713d0407baSopenharmony_ci default 4 if ARCH_S5PV210 723d0407baSopenharmony_ci default 2 733d0407baSopenharmony_ci depends on ARM_VIC 743d0407baSopenharmony_ci help 753d0407baSopenharmony_ci The maximum number of VICs available in the system, for 763d0407baSopenharmony_ci power management. 773d0407baSopenharmony_ci 783d0407baSopenharmony_ciconfig ARMADA_370_XP_IRQ 793d0407baSopenharmony_ci bool 803d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 813d0407baSopenharmony_ci select PCI_MSI if PCI 823d0407baSopenharmony_ci select GENERIC_IRQ_EFFECTIVE_AFF_MASK 833d0407baSopenharmony_ci 843d0407baSopenharmony_ciconfig ALPINE_MSI 853d0407baSopenharmony_ci bool 863d0407baSopenharmony_ci depends on PCI 873d0407baSopenharmony_ci select PCI_MSI 883d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 893d0407baSopenharmony_ci 903d0407baSopenharmony_ciconfig AL_FIC 913d0407baSopenharmony_ci bool "Amazon's Annapurna Labs Fabric Interrupt Controller" 923d0407baSopenharmony_ci depends on OF || COMPILE_TEST 933d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 943d0407baSopenharmony_ci select IRQ_DOMAIN 953d0407baSopenharmony_ci help 963d0407baSopenharmony_ci Support Amazon's Annapurna Labs Fabric Interrupt Controller. 973d0407baSopenharmony_ci 983d0407baSopenharmony_ciconfig ATMEL_AIC_IRQ 993d0407baSopenharmony_ci bool 1003d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 1013d0407baSopenharmony_ci select IRQ_DOMAIN 1023d0407baSopenharmony_ci select GENERIC_IRQ_MULTI_HANDLER 1033d0407baSopenharmony_ci select SPARSE_IRQ 1043d0407baSopenharmony_ci 1053d0407baSopenharmony_ciconfig ATMEL_AIC5_IRQ 1063d0407baSopenharmony_ci bool 1073d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 1083d0407baSopenharmony_ci select IRQ_DOMAIN 1093d0407baSopenharmony_ci select GENERIC_IRQ_MULTI_HANDLER 1103d0407baSopenharmony_ci select SPARSE_IRQ 1113d0407baSopenharmony_ci 1123d0407baSopenharmony_ciconfig I8259 1133d0407baSopenharmony_ci bool 1143d0407baSopenharmony_ci select IRQ_DOMAIN 1153d0407baSopenharmony_ci 1163d0407baSopenharmony_ciconfig BCM6345_L1_IRQ 1173d0407baSopenharmony_ci bool 1183d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 1193d0407baSopenharmony_ci select IRQ_DOMAIN 1203d0407baSopenharmony_ci select GENERIC_IRQ_EFFECTIVE_AFF_MASK 1213d0407baSopenharmony_ci 1223d0407baSopenharmony_ciconfig BCM7038_L1_IRQ 1233d0407baSopenharmony_ci bool 1243d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 1253d0407baSopenharmony_ci select IRQ_DOMAIN 1263d0407baSopenharmony_ci select GENERIC_IRQ_EFFECTIVE_AFF_MASK 1273d0407baSopenharmony_ci 1283d0407baSopenharmony_ciconfig BCM7120_L2_IRQ 1293d0407baSopenharmony_ci bool 1303d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 1313d0407baSopenharmony_ci select IRQ_DOMAIN 1323d0407baSopenharmony_ci 1333d0407baSopenharmony_ciconfig BRCMSTB_L2_IRQ 1343d0407baSopenharmony_ci bool 1353d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 1363d0407baSopenharmony_ci select IRQ_DOMAIN 1373d0407baSopenharmony_ci 1383d0407baSopenharmony_ciconfig DAVINCI_AINTC 1393d0407baSopenharmony_ci bool 1403d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 1413d0407baSopenharmony_ci select IRQ_DOMAIN 1423d0407baSopenharmony_ci 1433d0407baSopenharmony_ciconfig DAVINCI_CP_INTC 1443d0407baSopenharmony_ci bool 1453d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 1463d0407baSopenharmony_ci select IRQ_DOMAIN 1473d0407baSopenharmony_ci 1483d0407baSopenharmony_ciconfig DW_APB_ICTL 1493d0407baSopenharmony_ci bool 1503d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 1513d0407baSopenharmony_ci select IRQ_DOMAIN_HIERARCHY 1523d0407baSopenharmony_ci 1533d0407baSopenharmony_ciconfig FARADAY_FTINTC010 1543d0407baSopenharmony_ci bool 1553d0407baSopenharmony_ci select IRQ_DOMAIN 1563d0407baSopenharmony_ci select GENERIC_IRQ_MULTI_HANDLER 1573d0407baSopenharmony_ci select SPARSE_IRQ 1583d0407baSopenharmony_ci 1593d0407baSopenharmony_ciconfig HISILICON_IRQ_MBIGEN 1603d0407baSopenharmony_ci bool 1613d0407baSopenharmony_ci select ARM_GIC_V3 1623d0407baSopenharmony_ci select ARM_GIC_V3_ITS 1633d0407baSopenharmony_ci 1643d0407baSopenharmony_ciconfig IMGPDC_IRQ 1653d0407baSopenharmony_ci bool 1663d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 1673d0407baSopenharmony_ci select IRQ_DOMAIN 1683d0407baSopenharmony_ci 1693d0407baSopenharmony_ciconfig IXP4XX_IRQ 1703d0407baSopenharmony_ci bool 1713d0407baSopenharmony_ci select IRQ_DOMAIN 1723d0407baSopenharmony_ci select GENERIC_IRQ_MULTI_HANDLER 1733d0407baSopenharmony_ci select SPARSE_IRQ 1743d0407baSopenharmony_ci 1753d0407baSopenharmony_ciconfig MADERA_IRQ 1763d0407baSopenharmony_ci tristate 1773d0407baSopenharmony_ci 1783d0407baSopenharmony_ciconfig IRQ_MIPS_CPU 1793d0407baSopenharmony_ci bool 1803d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 1813d0407baSopenharmony_ci select GENERIC_IRQ_IPI if SMP && SYS_SUPPORTS_MULTITHREADING 1823d0407baSopenharmony_ci select IRQ_DOMAIN 1833d0407baSopenharmony_ci select GENERIC_IRQ_EFFECTIVE_AFF_MASK 1843d0407baSopenharmony_ci 1853d0407baSopenharmony_ciconfig CLPS711X_IRQCHIP 1863d0407baSopenharmony_ci bool 1873d0407baSopenharmony_ci depends on ARCH_CLPS711X 1883d0407baSopenharmony_ci select IRQ_DOMAIN 1893d0407baSopenharmony_ci select GENERIC_IRQ_MULTI_HANDLER 1903d0407baSopenharmony_ci select SPARSE_IRQ 1913d0407baSopenharmony_ci default y 1923d0407baSopenharmony_ci 1933d0407baSopenharmony_ciconfig OMPIC 1943d0407baSopenharmony_ci bool 1953d0407baSopenharmony_ci 1963d0407baSopenharmony_ciconfig OR1K_PIC 1973d0407baSopenharmony_ci bool 1983d0407baSopenharmony_ci select IRQ_DOMAIN 1993d0407baSopenharmony_ci 2003d0407baSopenharmony_ciconfig OMAP_IRQCHIP 2013d0407baSopenharmony_ci bool 2023d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 2033d0407baSopenharmony_ci select IRQ_DOMAIN 2043d0407baSopenharmony_ci 2053d0407baSopenharmony_ciconfig ORION_IRQCHIP 2063d0407baSopenharmony_ci bool 2073d0407baSopenharmony_ci select IRQ_DOMAIN 2083d0407baSopenharmony_ci select GENERIC_IRQ_MULTI_HANDLER 2093d0407baSopenharmony_ci 2103d0407baSopenharmony_ciconfig PIC32_EVIC 2113d0407baSopenharmony_ci bool 2123d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 2133d0407baSopenharmony_ci select IRQ_DOMAIN 2143d0407baSopenharmony_ci 2153d0407baSopenharmony_ciconfig JCORE_AIC 2163d0407baSopenharmony_ci bool "J-Core integrated AIC" if COMPILE_TEST 2173d0407baSopenharmony_ci depends on OF 2183d0407baSopenharmony_ci select IRQ_DOMAIN 2193d0407baSopenharmony_ci help 2203d0407baSopenharmony_ci Support for the J-Core integrated AIC. 2213d0407baSopenharmony_ci 2223d0407baSopenharmony_ciconfig RDA_INTC 2233d0407baSopenharmony_ci bool 2243d0407baSopenharmony_ci select IRQ_DOMAIN 2253d0407baSopenharmony_ci 2263d0407baSopenharmony_ciconfig RENESAS_INTC_IRQPIN 2273d0407baSopenharmony_ci bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST 2283d0407baSopenharmony_ci select IRQ_DOMAIN 2293d0407baSopenharmony_ci help 2303d0407baSopenharmony_ci Enable support for the Renesas Interrupt Controller for external 2313d0407baSopenharmony_ci interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs. 2323d0407baSopenharmony_ci 2333d0407baSopenharmony_ciconfig RENESAS_IRQC 2343d0407baSopenharmony_ci bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST 2353d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 2363d0407baSopenharmony_ci select IRQ_DOMAIN 2373d0407baSopenharmony_ci help 2383d0407baSopenharmony_ci Enable support for the Renesas Interrupt Controller for external 2393d0407baSopenharmony_ci devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs. 2403d0407baSopenharmony_ci 2413d0407baSopenharmony_ciconfig RENESAS_RZA1_IRQC 2423d0407baSopenharmony_ci bool "Renesas RZ/A1 IRQC support" if COMPILE_TEST 2433d0407baSopenharmony_ci select IRQ_DOMAIN_HIERARCHY 2443d0407baSopenharmony_ci help 2453d0407baSopenharmony_ci Enable support for the Renesas RZ/A1 Interrupt Controller, to use up 2463d0407baSopenharmony_ci to 8 external interrupts with configurable sense select. 2473d0407baSopenharmony_ci 2483d0407baSopenharmony_ciconfig SL28CPLD_INTC 2493d0407baSopenharmony_ci bool "Kontron sl28cpld IRQ controller" 2503d0407baSopenharmony_ci depends on MFD_SL28CPLD=y || COMPILE_TEST 2513d0407baSopenharmony_ci select REGMAP_IRQ 2523d0407baSopenharmony_ci help 2533d0407baSopenharmony_ci Interrupt controller driver for the board management controller 2543d0407baSopenharmony_ci found on the Kontron sl28 CPLD. 2553d0407baSopenharmony_ci 2563d0407baSopenharmony_ciconfig ST_IRQCHIP 2573d0407baSopenharmony_ci bool 2583d0407baSopenharmony_ci select REGMAP 2593d0407baSopenharmony_ci select MFD_SYSCON 2603d0407baSopenharmony_ci help 2613d0407baSopenharmony_ci Enables SysCfg Controlled IRQs on STi based platforms. 2623d0407baSopenharmony_ci 2633d0407baSopenharmony_ciconfig TANGO_IRQ 2643d0407baSopenharmony_ci bool 2653d0407baSopenharmony_ci select IRQ_DOMAIN 2663d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 2673d0407baSopenharmony_ci 2683d0407baSopenharmony_ciconfig TB10X_IRQC 2693d0407baSopenharmony_ci bool 2703d0407baSopenharmony_ci select IRQ_DOMAIN 2713d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 2723d0407baSopenharmony_ci 2733d0407baSopenharmony_ciconfig TS4800_IRQ 2743d0407baSopenharmony_ci tristate "TS-4800 IRQ controller" 2753d0407baSopenharmony_ci select IRQ_DOMAIN 2763d0407baSopenharmony_ci depends on HAS_IOMEM 2773d0407baSopenharmony_ci depends on SOC_IMX51 || COMPILE_TEST 2783d0407baSopenharmony_ci help 2793d0407baSopenharmony_ci Support for the TS-4800 FPGA IRQ controller 2803d0407baSopenharmony_ci 2813d0407baSopenharmony_ciconfig VERSATILE_FPGA_IRQ 2823d0407baSopenharmony_ci bool 2833d0407baSopenharmony_ci select IRQ_DOMAIN 2843d0407baSopenharmony_ci 2853d0407baSopenharmony_ciconfig VERSATILE_FPGA_IRQ_NR 2863d0407baSopenharmony_ci int 2873d0407baSopenharmony_ci default 4 2883d0407baSopenharmony_ci depends on VERSATILE_FPGA_IRQ 2893d0407baSopenharmony_ci 2903d0407baSopenharmony_ciconfig XTENSA_MX 2913d0407baSopenharmony_ci bool 2923d0407baSopenharmony_ci select IRQ_DOMAIN 2933d0407baSopenharmony_ci select GENERIC_IRQ_EFFECTIVE_AFF_MASK 2943d0407baSopenharmony_ci 2953d0407baSopenharmony_ciconfig XILINX_INTC 2963d0407baSopenharmony_ci bool 2973d0407baSopenharmony_ci select IRQ_DOMAIN 2983d0407baSopenharmony_ci 2993d0407baSopenharmony_ciconfig IRQ_CROSSBAR 3003d0407baSopenharmony_ci bool 3013d0407baSopenharmony_ci help 3023d0407baSopenharmony_ci Support for a CROSSBAR ip that precedes the main interrupt controller. 3033d0407baSopenharmony_ci The primary irqchip invokes the crossbar's callback which inturn allocates 3043d0407baSopenharmony_ci a free irq and configures the IP. Thus the peripheral interrupts are 3053d0407baSopenharmony_ci routed to one of the free irqchip interrupt lines. 3063d0407baSopenharmony_ci 3073d0407baSopenharmony_ciconfig KEYSTONE_IRQ 3083d0407baSopenharmony_ci tristate "Keystone 2 IRQ controller IP" 3093d0407baSopenharmony_ci depends on ARCH_KEYSTONE 3103d0407baSopenharmony_ci help 3113d0407baSopenharmony_ci Support for Texas Instruments Keystone 2 IRQ controller IP which 3123d0407baSopenharmony_ci is part of the Keystone 2 IPC mechanism 3133d0407baSopenharmony_ci 3143d0407baSopenharmony_ciconfig MIPS_GIC 3153d0407baSopenharmony_ci bool 3163d0407baSopenharmony_ci select GENERIC_IRQ_IPI if SMP 3173d0407baSopenharmony_ci select IRQ_DOMAIN_HIERARCHY 3183d0407baSopenharmony_ci select MIPS_CM 3193d0407baSopenharmony_ci 3203d0407baSopenharmony_ciconfig INGENIC_IRQ 3213d0407baSopenharmony_ci bool 3223d0407baSopenharmony_ci depends on MACH_INGENIC 3233d0407baSopenharmony_ci default y 3243d0407baSopenharmony_ci 3253d0407baSopenharmony_ciconfig INGENIC_TCU_IRQ 3263d0407baSopenharmony_ci bool "Ingenic JZ47xx TCU interrupt controller" 3273d0407baSopenharmony_ci default MACH_INGENIC 3283d0407baSopenharmony_ci depends on MIPS || COMPILE_TEST 3293d0407baSopenharmony_ci select MFD_SYSCON 3303d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 3313d0407baSopenharmony_ci help 3323d0407baSopenharmony_ci Support for interrupts in the Timer/Counter Unit (TCU) of the Ingenic 3333d0407baSopenharmony_ci JZ47xx SoCs. 3343d0407baSopenharmony_ci 3353d0407baSopenharmony_ci If unsure, say N. 3363d0407baSopenharmony_ci 3373d0407baSopenharmony_ciconfig RENESAS_H8300H_INTC 3383d0407baSopenharmony_ci bool 3393d0407baSopenharmony_ci select IRQ_DOMAIN 3403d0407baSopenharmony_ci 3413d0407baSopenharmony_ciconfig RENESAS_H8S_INTC 3423d0407baSopenharmony_ci bool "Renesas H8S Interrupt Controller Support" if COMPILE_TEST 3433d0407baSopenharmony_ci select IRQ_DOMAIN 3443d0407baSopenharmony_ci help 3453d0407baSopenharmony_ci Enable support for the Renesas H8/300 Interrupt Controller, as found 3463d0407baSopenharmony_ci on Renesas H8S SoCs. 3473d0407baSopenharmony_ci 3483d0407baSopenharmony_ciconfig IMX_GPCV2 3493d0407baSopenharmony_ci bool 3503d0407baSopenharmony_ci select IRQ_DOMAIN 3513d0407baSopenharmony_ci help 3523d0407baSopenharmony_ci Enables the wakeup IRQs for IMX platforms with GPCv2 block 3533d0407baSopenharmony_ci 3543d0407baSopenharmony_ciconfig IRQ_MXS 3553d0407baSopenharmony_ci def_bool y if MACH_ASM9260 || ARCH_MXS 3563d0407baSopenharmony_ci select IRQ_DOMAIN 3573d0407baSopenharmony_ci select STMP_DEVICE 3583d0407baSopenharmony_ci 3593d0407baSopenharmony_ciconfig MSCC_OCELOT_IRQ 3603d0407baSopenharmony_ci bool 3613d0407baSopenharmony_ci select IRQ_DOMAIN 3623d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 3633d0407baSopenharmony_ci 3643d0407baSopenharmony_ciconfig MVEBU_GICP 3653d0407baSopenharmony_ci bool 3663d0407baSopenharmony_ci 3673d0407baSopenharmony_ciconfig MVEBU_ICU 3683d0407baSopenharmony_ci bool 3693d0407baSopenharmony_ci 3703d0407baSopenharmony_ciconfig MVEBU_ODMI 3713d0407baSopenharmony_ci bool 3723d0407baSopenharmony_ci select GENERIC_MSI_IRQ_DOMAIN 3733d0407baSopenharmony_ci 3743d0407baSopenharmony_ciconfig MVEBU_PIC 3753d0407baSopenharmony_ci bool 3763d0407baSopenharmony_ci 3773d0407baSopenharmony_ciconfig MVEBU_SEI 3783d0407baSopenharmony_ci bool 3793d0407baSopenharmony_ci 3803d0407baSopenharmony_ciconfig LS_EXTIRQ 3813d0407baSopenharmony_ci def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 3823d0407baSopenharmony_ci select MFD_SYSCON 3833d0407baSopenharmony_ci 3843d0407baSopenharmony_ciconfig LS_SCFG_MSI 3853d0407baSopenharmony_ci def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 3863d0407baSopenharmony_ci depends on PCI && PCI_MSI 3873d0407baSopenharmony_ci 3883d0407baSopenharmony_ciconfig PARTITION_PERCPU 3893d0407baSopenharmony_ci bool 3903d0407baSopenharmony_ci 3913d0407baSopenharmony_ciconfig EZNPS_GIC 3923d0407baSopenharmony_ci bool "NPS400 Global Interrupt Manager (GIM)" 3933d0407baSopenharmony_ci depends on ARC || (COMPILE_TEST && !64BIT) 3943d0407baSopenharmony_ci select IRQ_DOMAIN 3953d0407baSopenharmony_ci help 3963d0407baSopenharmony_ci Support the EZchip NPS400 global interrupt controller 3973d0407baSopenharmony_ci 3983d0407baSopenharmony_ciconfig STM32_EXTI 3993d0407baSopenharmony_ci bool 4003d0407baSopenharmony_ci select IRQ_DOMAIN 4013d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 4023d0407baSopenharmony_ci 4033d0407baSopenharmony_ciconfig QCOM_IRQ_COMBINER 4043d0407baSopenharmony_ci bool "QCOM IRQ combiner support" 4053d0407baSopenharmony_ci depends on ARCH_QCOM && ACPI 4063d0407baSopenharmony_ci select IRQ_DOMAIN_HIERARCHY 4073d0407baSopenharmony_ci help 4083d0407baSopenharmony_ci Say yes here to add support for the IRQ combiner devices embedded 4093d0407baSopenharmony_ci in Qualcomm Technologies chips. 4103d0407baSopenharmony_ci 4113d0407baSopenharmony_ciconfig IRQ_UNIPHIER_AIDET 4123d0407baSopenharmony_ci bool "UniPhier AIDET support" if COMPILE_TEST 4133d0407baSopenharmony_ci depends on ARCH_UNIPHIER || COMPILE_TEST 4143d0407baSopenharmony_ci default ARCH_UNIPHIER 4153d0407baSopenharmony_ci select IRQ_DOMAIN_HIERARCHY 4163d0407baSopenharmony_ci help 4173d0407baSopenharmony_ci Support for the UniPhier AIDET (ARM Interrupt Detector). 4183d0407baSopenharmony_ci 4193d0407baSopenharmony_ciconfig MESON_IRQ_GPIO 4203d0407baSopenharmony_ci tristate "Meson GPIO Interrupt Multiplexer" 4213d0407baSopenharmony_ci depends on ARCH_MESON || COMPILE_TEST 4223d0407baSopenharmony_ci default ARCH_MESON 4233d0407baSopenharmony_ci select IRQ_DOMAIN_HIERARCHY 4243d0407baSopenharmony_ci help 4253d0407baSopenharmony_ci Support Meson SoC Family GPIO Interrupt Multiplexer 4263d0407baSopenharmony_ci 4273d0407baSopenharmony_ciconfig GOLDFISH_PIC 4283d0407baSopenharmony_ci bool "Goldfish programmable interrupt controller" 4293d0407baSopenharmony_ci depends on MIPS && (GOLDFISH || COMPILE_TEST) 4303d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 4313d0407baSopenharmony_ci select IRQ_DOMAIN 4323d0407baSopenharmony_ci help 4333d0407baSopenharmony_ci Say yes here to enable Goldfish interrupt controller driver used 4343d0407baSopenharmony_ci for Goldfish based virtual platforms. 4353d0407baSopenharmony_ci 4363d0407baSopenharmony_ciconfig QCOM_PDC 4373d0407baSopenharmony_ci bool "QCOM PDC" 4383d0407baSopenharmony_ci depends on ARCH_QCOM 4393d0407baSopenharmony_ci select IRQ_DOMAIN_HIERARCHY 4403d0407baSopenharmony_ci help 4413d0407baSopenharmony_ci Power Domain Controller driver to manage and configure wakeup 4423d0407baSopenharmony_ci IRQs for Qualcomm Technologies Inc (QTI) mobile chips. 4433d0407baSopenharmony_ci 4443d0407baSopenharmony_ciconfig CSKY_MPINTC 4453d0407baSopenharmony_ci bool "C-SKY Multi Processor Interrupt Controller" 4463d0407baSopenharmony_ci depends on CSKY 4473d0407baSopenharmony_ci help 4483d0407baSopenharmony_ci Say yes here to enable C-SKY SMP interrupt controller driver used 4493d0407baSopenharmony_ci for C-SKY SMP system. 4503d0407baSopenharmony_ci In fact it's not mmio map in hardware and it uses ld/st to visit the 4513d0407baSopenharmony_ci controller's register inside CPU. 4523d0407baSopenharmony_ci 4533d0407baSopenharmony_ciconfig CSKY_APB_INTC 4543d0407baSopenharmony_ci bool "C-SKY APB Interrupt Controller" 4553d0407baSopenharmony_ci depends on CSKY 4563d0407baSopenharmony_ci help 4573d0407baSopenharmony_ci Say yes here to enable C-SKY APB interrupt controller driver used 4583d0407baSopenharmony_ci by C-SKY single core SOC system. It uses mmio map apb-bus to visit 4593d0407baSopenharmony_ci the controller's register. 4603d0407baSopenharmony_ci 4613d0407baSopenharmony_ciconfig IMX_IRQSTEER 4623d0407baSopenharmony_ci bool "i.MX IRQSTEER support" 4633d0407baSopenharmony_ci depends on ARCH_MXC || COMPILE_TEST 4643d0407baSopenharmony_ci default ARCH_MXC 4653d0407baSopenharmony_ci select IRQ_DOMAIN 4663d0407baSopenharmony_ci help 4673d0407baSopenharmony_ci Support for the i.MX IRQSTEER interrupt multiplexer/remapper. 4683d0407baSopenharmony_ci 4693d0407baSopenharmony_ciconfig IMX_INTMUX 4703d0407baSopenharmony_ci bool "i.MX INTMUX support" if COMPILE_TEST 4713d0407baSopenharmony_ci default y if ARCH_MXC 4723d0407baSopenharmony_ci select IRQ_DOMAIN 4733d0407baSopenharmony_ci help 4743d0407baSopenharmony_ci Support for the i.MX INTMUX interrupt multiplexer. 4753d0407baSopenharmony_ci 4763d0407baSopenharmony_ciconfig LS1X_IRQ 4773d0407baSopenharmony_ci bool "Loongson-1 Interrupt Controller" 4783d0407baSopenharmony_ci depends on MACH_LOONGSON32 4793d0407baSopenharmony_ci default y 4803d0407baSopenharmony_ci select IRQ_DOMAIN 4813d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 4823d0407baSopenharmony_ci help 4833d0407baSopenharmony_ci Support for the Loongson-1 platform Interrupt Controller. 4843d0407baSopenharmony_ci 4853d0407baSopenharmony_ciconfig TI_SCI_INTR_IRQCHIP 4863d0407baSopenharmony_ci bool 4873d0407baSopenharmony_ci depends on TI_SCI_PROTOCOL 4883d0407baSopenharmony_ci select IRQ_DOMAIN_HIERARCHY 4893d0407baSopenharmony_ci help 4903d0407baSopenharmony_ci This enables the irqchip driver support for K3 Interrupt router 4913d0407baSopenharmony_ci over TI System Control Interface available on some new TI's SoCs. 4923d0407baSopenharmony_ci If you wish to use interrupt router irq resources managed by the 4933d0407baSopenharmony_ci TI System Controller, say Y here. Otherwise, say N. 4943d0407baSopenharmony_ci 4953d0407baSopenharmony_ciconfig TI_SCI_INTA_IRQCHIP 4963d0407baSopenharmony_ci bool 4973d0407baSopenharmony_ci depends on TI_SCI_PROTOCOL 4983d0407baSopenharmony_ci select IRQ_DOMAIN_HIERARCHY 4993d0407baSopenharmony_ci select TI_SCI_INTA_MSI_DOMAIN 5003d0407baSopenharmony_ci help 5013d0407baSopenharmony_ci This enables the irqchip driver support for K3 Interrupt aggregator 5023d0407baSopenharmony_ci over TI System Control Interface available on some new TI's SoCs. 5033d0407baSopenharmony_ci If you wish to use interrupt aggregator irq resources managed by the 5043d0407baSopenharmony_ci TI System Controller, say Y here. Otherwise, say N. 5053d0407baSopenharmony_ci 5063d0407baSopenharmony_ciconfig TI_PRUSS_INTC 5073d0407baSopenharmony_ci tristate "TI PRU-ICSS Interrupt Controller" 5083d0407baSopenharmony_ci depends on ARCH_DAVINCI || SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX || ARCH_KEYSTONE || ARCH_K3 5093d0407baSopenharmony_ci select IRQ_DOMAIN 5103d0407baSopenharmony_ci help 5113d0407baSopenharmony_ci This enables support for the PRU-ICSS Local Interrupt Controller 5123d0407baSopenharmony_ci present within a PRU-ICSS subsystem present on various TI SoCs. 5133d0407baSopenharmony_ci The PRUSS INTC enables various interrupts to be routed to multiple 5143d0407baSopenharmony_ci different processors within the SoC. 5153d0407baSopenharmony_ci 5163d0407baSopenharmony_ciconfig RISCV_INTC 5173d0407baSopenharmony_ci bool "RISC-V Local Interrupt Controller" 5183d0407baSopenharmony_ci depends on RISCV 5193d0407baSopenharmony_ci default y 5203d0407baSopenharmony_ci help 5213d0407baSopenharmony_ci This enables support for the per-HART local interrupt controller 5223d0407baSopenharmony_ci found in standard RISC-V systems. The per-HART local interrupt 5233d0407baSopenharmony_ci controller handles timer interrupts, software interrupts, and 5243d0407baSopenharmony_ci hardware interrupts. Without a per-HART local interrupt controller, 5253d0407baSopenharmony_ci a RISC-V system will be unable to handle any interrupts. 5263d0407baSopenharmony_ci 5273d0407baSopenharmony_ci If you don't know what to do here, say Y. 5283d0407baSopenharmony_ci 5293d0407baSopenharmony_ciconfig SIFIVE_PLIC 5303d0407baSopenharmony_ci bool "SiFive Platform-Level Interrupt Controller" 5313d0407baSopenharmony_ci depends on RISCV 5323d0407baSopenharmony_ci select IRQ_DOMAIN_HIERARCHY 5333d0407baSopenharmony_ci help 5343d0407baSopenharmony_ci This enables support for the PLIC chip found in SiFive (and 5353d0407baSopenharmony_ci potentially other) RISC-V systems. The PLIC controls devices 5363d0407baSopenharmony_ci interrupts and connects them to each core's local interrupt 5373d0407baSopenharmony_ci controller. Aside from timer and software interrupts, all other 5383d0407baSopenharmony_ci interrupt sources are subordinate to the PLIC. 5393d0407baSopenharmony_ci 5403d0407baSopenharmony_ci If you don't know what to do here, say Y. 5413d0407baSopenharmony_ci 5423d0407baSopenharmony_ciconfig EXYNOS_IRQ_COMBINER 5433d0407baSopenharmony_ci bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST 5443d0407baSopenharmony_ci depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST 5453d0407baSopenharmony_ci help 5463d0407baSopenharmony_ci Say yes here to add support for the IRQ combiner devices embedded 5473d0407baSopenharmony_ci in Samsung Exynos chips. 5483d0407baSopenharmony_ci 5493d0407baSopenharmony_ciconfig LOONGSON_LIOINTC 5503d0407baSopenharmony_ci bool "Loongson Local I/O Interrupt Controller" 5513d0407baSopenharmony_ci depends on MACH_LOONGSON64 5523d0407baSopenharmony_ci default y 5533d0407baSopenharmony_ci select IRQ_DOMAIN 5543d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 5553d0407baSopenharmony_ci help 5563d0407baSopenharmony_ci Support for the Loongson Local I/O Interrupt Controller. 5573d0407baSopenharmony_ci 5583d0407baSopenharmony_ciconfig LOONGSON_HTPIC 5593d0407baSopenharmony_ci bool "Loongson3 HyperTransport PIC Controller" 5603d0407baSopenharmony_ci depends on MACH_LOONGSON64 5613d0407baSopenharmony_ci default y 5623d0407baSopenharmony_ci select IRQ_DOMAIN 5633d0407baSopenharmony_ci select GENERIC_IRQ_CHIP 5643d0407baSopenharmony_ci help 5653d0407baSopenharmony_ci Support for the Loongson-3 HyperTransport PIC Controller. 5663d0407baSopenharmony_ci 5673d0407baSopenharmony_ciconfig LOONGSON_HTVEC 5683d0407baSopenharmony_ci bool "Loongson3 HyperTransport Interrupt Vector Controller" 5693d0407baSopenharmony_ci depends on MACH_LOONGSON64 5703d0407baSopenharmony_ci default MACH_LOONGSON64 5713d0407baSopenharmony_ci select IRQ_DOMAIN_HIERARCHY 5723d0407baSopenharmony_ci help 5733d0407baSopenharmony_ci Support for the Loongson3 HyperTransport Interrupt Vector Controller. 5743d0407baSopenharmony_ci 5753d0407baSopenharmony_ciconfig LOONGSON_PCH_PIC 5763d0407baSopenharmony_ci bool "Loongson PCH PIC Controller" 5773d0407baSopenharmony_ci depends on MACH_LOONGSON64 || COMPILE_TEST 5783d0407baSopenharmony_ci default MACH_LOONGSON64 5793d0407baSopenharmony_ci select IRQ_DOMAIN_HIERARCHY 5803d0407baSopenharmony_ci select IRQ_FASTEOI_HIERARCHY_HANDLERS 5813d0407baSopenharmony_ci help 5823d0407baSopenharmony_ci Support for the Loongson PCH PIC Controller. 5833d0407baSopenharmony_ci 5843d0407baSopenharmony_ciconfig LOONGSON_PCH_MSI 5853d0407baSopenharmony_ci bool "Loongson PCH MSI Controller" 5863d0407baSopenharmony_ci depends on MACH_LOONGSON64 || COMPILE_TEST 5873d0407baSopenharmony_ci depends on PCI 5883d0407baSopenharmony_ci default MACH_LOONGSON64 5893d0407baSopenharmony_ci select IRQ_DOMAIN_HIERARCHY 5903d0407baSopenharmony_ci select PCI_MSI 5913d0407baSopenharmony_ci help 5923d0407baSopenharmony_ci Support for the Loongson PCH MSI Controller. 5933d0407baSopenharmony_ci 5943d0407baSopenharmony_ciconfig MST_IRQ 5953d0407baSopenharmony_ci bool "MStar Interrupt Controller" 5963d0407baSopenharmony_ci depends on ARCH_MEDIATEK || ARCH_MSTARV7 || COMPILE_TEST 5973d0407baSopenharmony_ci default ARCH_MEDIATEK 5983d0407baSopenharmony_ci select IRQ_DOMAIN 5993d0407baSopenharmony_ci select IRQ_DOMAIN_HIERARCHY 6003d0407baSopenharmony_ci help 6013d0407baSopenharmony_ci Support MStar Interrupt Controller. 6023d0407baSopenharmony_ci 6033d0407baSopenharmony_ciendmenu 604