1/*
2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 *     http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16#ifndef __ADC_DRV_H__
17#define __ADC_DRV_H__
18#include <hi_types.h>
19#ifdef __cplusplus
20#if __cplusplus
21extern "C" {
22#endif
23#endif  /* __cplusplus */
24
25
26#define LS_ADC_CLK_DIV1_REG     CLDO_CTL_CLK_DIV1_REG
27#define LS_ADC_CLK_DIV1_OFFSET  9
28
29#define HI_LS_ADC_REG_BASE      0x40070000 /* LD ADC base address */
30#define REG_ADC_CFG      (HI_LS_ADC_REG_BASE + 0x00)
31#define REG_ADC_FIFO_CFG (HI_LS_ADC_REG_BASE + 0x04)
32#define REG_ADC_IMSC     (HI_LS_ADC_REG_BASE + 0x08)
33#define REG_ADC_CR       (HI_LS_ADC_REG_BASE + 0x0C)
34#define REG_ADC_SR       (HI_LS_ADC_REG_BASE + 0x10)
35#define REG_ADC_RIS      (HI_LS_ADC_REG_BASE + 0x14)
36#define REG_ADC_MIS      (HI_LS_ADC_REG_BASE + 0x18)
37#define REG_ADC_START    (HI_LS_ADC_REG_BASE + 0x1C)
38#define REG_ADC_STOP     (HI_LS_ADC_REG_BASE + 0x20)
39#define REG_ADC_DR       (HI_LS_ADC_REG_BASE + 0x24)
40#define REG_ADC_CTRL     (HI_LS_ADC_REG_BASE + 0x28)
41#define REG_ADC_EN       (HI_LS_ADC_REG_BASE + 0x2C)
42
43#define ADC_INT_FIFO_WATER_LINE (1 << 1)
44#define ADC_INT_FIFO_OVER_FLOW  (1 << 0)
45
46#define ADC_SR_RNE (1 << 0) /* FIFO not empty flag: 0:empty 1:not empty */
47#define ADC_SR_RFF (1 << 1) /* FIFO full flag 0:not full 1:full */
48#define ADC_SR_BSY (1 << 2) /* ADC busy flag 0:idle 1:busy */
49
50#define ADC_SCAN_START  1
51#define ADC_SCAN_STOP   1
52#define ADC_POWER_ON    0
53#define ADC_POWER_OFF   1
54#define ADC_ISR_DISABLE 0
55
56/*
57 * The longest time to get 1 data is ((0xfff+(18*8)+3)*334)ns
58 * The unit of this cnt is about 5us
59 */
60#define ADC_PER_DATA_TIMEOUT_CNT 500
61#define ADC_LOOP_DELAY_US        5
62hi_u32 get_average_ref_vlt(hi_u16 *voltage);
63#ifdef __cplusplus
64#if __cplusplus
65}
66#endif
67#endif  /* __cplusplus */
68
69#endif
70