1/* 2 * Copyright (c) 2022 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 16#ifndef HI_COMM_VI_H 17#define HI_COMM_VI_H 18 19#include "hi_common.h" 20#include "hi_errno.h" 21#include "hi_comm_video.h" 22#include "hi_comm_gdc.h" 23 24#ifdef __cplusplus 25#if __cplusplus 26extern "C" { 27#endif 28#endif /* __cplusplus */ 29 30#define VI_MAX_ADCHN_NUM 4UL 31 32#define VI_PMFCOEF_NUM 9UL 33#define VI_COMPMASK_NUM 2UL 34#define VI_PRO_MAX_FRAME_NUM 8UL 35 36#define VI_INVALID_FRMRATE (-1) 37#define VI_CHN0 0 38#define VI_CHN1 1 39#define VI_CHN2 2 40#define VI_CHN3 3 41#define VI_INVALID_CHN (-1) 42 43#define VI_MAX_VC_NUM 4U 44 45typedef struct hiVI_LOW_DELAY_INFO_S { 46 HI_BOOL bEnable; /* RW; Low delay enable. */ 47 HI_U32 u32LineCnt; /* RW; Range: [32, 16384]; Low delay shoreline. */ 48} VI_LOW_DELAY_INFO_S; 49 50/* Information of raw data cmpresss param */ 51typedef struct hiVI_CMP_PARAM_S { 52 HI_U8 au8CmpParam[VI_CMP_PARAM_SIZE]; 53} VI_CMP_PARAM_S; 54 55typedef enum hi_VI_USERPIC_MODE_E { 56 VI_USERPIC_MODE_PIC = 0, /* YUV picture */ 57 VI_USERPIC_MODE_BGC, /* Background picture only with a color */ 58 VI_USERPIC_MODE_BUTT, 59} VI_USERPIC_MODE_E; 60 61typedef struct hiVI_USERPIC_BGC_S { 62 HI_U32 u32BgColor; 63} VI_USERPIC_BGC_S; 64 65typedef struct hiVI_USERPIC_ATTR_S { 66 VI_USERPIC_MODE_E enUsrPicMode; /* User picture mode */ 67 union { 68 VIDEO_FRAME_INFO_S stUsrPicFrm; /* Information about a YUV picture */ 69 VI_USERPIC_BGC_S stUsrPicBg; /* Information about a background picture only with a color */ 70 } unUsrPic; 71} VI_USERPIC_ATTR_S; 72 73typedef enum hiEN_VI_ERR_CODE_E { 74 ERR_VI_FAILED_NOTENABLE = 64, /* device or channel not enable */ 75 ERR_VI_FAILED_NOTDISABLE, /* device not disable */ 76 ERR_VI_FAILED_CHNOTDISABLE, /* channel not disable */ 77 ERR_VI_CFG_TIMEOUT, /* config timeout */ 78 ERR_VI_NORM_UNMATCH, /* video norm of ADC and VIU is unmatch */ 79 ERR_VI_INVALID_WAYID, /* invlalid way ID */ 80 ERR_VI_INVALID_PHYCHNID, /* invalid phychn id */ 81 ERR_VI_FAILED_NOTBIND, /* device or channel not bind */ 82 ERR_VI_FAILED_BINDED, /* device or channel not unbind */ 83 ERR_VI_DIS_PROCESS_FAIL, /* dis process failed */ 84 ERR_VI_INVALID_MCFGRPID /* invlalid mcf group ID */ 85} EN_VI_ERR_CODE_E; 86 87#define HI_ERR_VI_INVALID_PARA HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM) 88#define HI_ERR_VI_INVALID_DEVID HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_DEVID) 89#define HI_ERR_VI_INVALID_PIPEID HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_PIPEID) 90#define HI_ERR_VI_INVALID_STITCHGRPID HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_STITCHGRPID) 91#define HI_ERR_VI_INVALID_CHNID HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID) 92#define HI_ERR_VI_INVALID_NULL_PTR HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR) 93#define HI_ERR_VI_FAILED_NOTCONFIG HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_CONFIG) 94#define HI_ERR_VI_SYS_NOTREADY HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY) 95#define HI_ERR_VI_BUF_EMPTY HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY) 96#define HI_ERR_VI_BUF_FULL HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_FULL) 97#define HI_ERR_VI_NOMEM HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM) 98#define HI_ERR_VI_NOT_SUPPORT HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT) 99#define HI_ERR_VI_BUSY HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY) 100#define HI_ERR_VI_NOT_PERM HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM) 101 102#define HI_ERR_VI_FAILED_NOTENABLE HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_FAILED_NOTENABLE) 103#define HI_ERR_VI_FAILED_NOTDISABLE HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_FAILED_NOTDISABLE) 104#define HI_ERR_VI_FAILED_CHNOTDISABLE HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_FAILED_CHNOTDISABLE) 105#define HI_ERR_VI_CFG_TIMEOUT HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_CFG_TIMEOUT) 106#define HI_ERR_VI_NORM_UNMATCH HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_NORM_UNMATCH) 107#define HI_ERR_VI_INVALID_WAYID HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_INVALID_WAYID) 108#define HI_ERR_VI_INVALID_PHYCHNID HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_INVALID_PHYCHNID) 109#define HI_ERR_VI_FAILED_NOTBIND HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_FAILED_NOTBIND) 110#define HI_ERR_VI_FAILED_BINDED HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_FAILED_BINDED) 111 112#define HI_ERR_VI_PIPE_EXIST HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_EXIST) 113#define HI_ERR_VI_PIPE_UNEXIST HI_DEF_ERR(HI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST) 114 115/* interface mode of video input */ 116typedef enum hiVI_INTF_MODE_E { 117 VI_MODE_BT656 = 0, /* ITU-R BT.656 YUV4:2:2 */ 118 VI_MODE_BT656_PACKED_YUV, /* ITU-R BT.656 packed YUV4:2:2 */ 119 VI_MODE_BT601, /* ITU-R BT.601 YUV4:2:2 */ 120 VI_MODE_DIGITAL_CAMERA, /* digatal camera mode */ 121 VI_MODE_BT1120_STANDARD, /* BT.1120 progressive mode */ 122 VI_MODE_BT1120_INTERLEAVED, /* BT.1120 interstage mode */ 123 VI_MODE_MIPI, /* MIPI RAW mode */ 124 VI_MODE_MIPI_YUV420_NORMAL, /* MIPI YUV420 normal mode */ 125 VI_MODE_MIPI_YUV420_LEGACY, /* MIPI YUV420 legacy mode */ 126 VI_MODE_MIPI_YUV422, /* MIPI YUV422 mode */ 127 VI_MODE_LVDS, /* LVDS mode */ 128 VI_MODE_HISPI, /* HiSPi mode */ 129 VI_MODE_SLVS, /* SLVS mode */ 130 131 VI_MODE_BUTT 132} VI_INTF_MODE_E; 133 134/* Input mode */ 135typedef enum hiVI_INPUT_MODE_E { 136 VI_INPUT_MODE_BT656 = 0, /* ITU-R BT.656 YUV4:2:2 */ 137 VI_INPUT_MODE_BT601, /* ITU-R BT.601 YUV4:2:2 */ 138 VI_INPUT_MODE_DIGITAL_CAMERA, /* digatal camera mode */ 139 VI_INPUT_MODE_INTERLEAVED, /* interstage mode */ 140 VI_INPUT_MODE_MIPI, /* MIPI mode */ 141 VI_INPUT_MODE_LVDS, /* LVDS mode */ 142 VI_INPUT_MODE_HISPI, /* HiSPi mode */ 143 VI_INPUT_MODE_SLVS, /* SLVS mode */ 144 145 VI_INPUT_MODE_BUTT 146} VI_INPUT_MODE_E; 147 148/* Work mode */ 149typedef enum hiVI_WORK_MODE_E { 150 VI_WORK_MODE_1Multiplex = 0, /* 1 Multiplex mode */ 151 VI_WORK_MODE_2Multiplex, /* 2 Multiplex mode */ 152 VI_WORK_MODE_3Multiplex, /* 3 Multiplex mode */ 153 VI_WORK_MODE_4Multiplex, /* 4 Multiplex mode */ 154 155 VI_WORK_MODE_BUTT 156} VI_WORK_MODE_E; 157 158/* whether an input picture is interlaced or progressive */ 159typedef enum hiVI_SCAN_MODE_E { 160 VI_SCAN_INTERLACED = 0, /* interlaced mode */ 161 VI_SCAN_PROGRESSIVE, /* progressive mode */ 162 163 VI_SCAN_BUTT 164} VI_SCAN_MODE_E; 165 166/* Sequence of YUV data */ 167typedef enum hiVI_YUV_DATA_SEQ_E { 168 VI_DATA_SEQ_VUVU = 0, /* The input sequence of the second component(only contains u and v) in BT. 169 1120 mode is VUVU */ 170 VI_DATA_SEQ_UVUV, /* The input sequence of the second component(only contains u and v) in BT. 171 1120 mode is UVUV */ 172 173 VI_DATA_SEQ_UYVY, /* The input sequence of YUV is UYVY */ 174 VI_DATA_SEQ_VYUY, /* The input sequence of YUV is VYUY */ 175 VI_DATA_SEQ_YUYV, /* The input sequence of YUV is YUYV */ 176 VI_DATA_SEQ_YVYU, /* The input sequence of YUV is YVYU */ 177 178 VI_DATA_SEQ_BUTT 179} VI_YUV_DATA_SEQ_E; 180 181/* Clock edge mode */ 182typedef enum hiVI_CLK_EDGE_E { 183 VI_CLK_EDGE_SINGLE_UP = 0, /* single-edge mode and in rising edge */ 184 VI_CLK_EDGE_SINGLE_DOWN, /* single-edge mode and in falling edge */ 185 186 VI_CLK_EDGE_BUTT 187} VI_CLK_EDGE_E; 188 189/* Component mode */ 190typedef enum hiVI_COMPONENT_MODE_E { 191 VI_COMPONENT_MODE_SINGLE = 0, /* single component mode */ 192 VI_COMPONENT_MODE_DOUBLE, /* double component mode */ 193 194 VI_COMPONENT_MODE_BUTT 195} VI_COMPONENT_MODE_E; 196 197/* Y/C composite or separation mode */ 198typedef enum hiVI_COMBINE_MODE_E { 199 VI_COMBINE_COMPOSITE = 0, /* Composite mode */ 200 VI_COMBINE_SEPARATE, /* Separate mode */ 201 202 VI_COMBINE_BUTT 203} VI_COMBINE_MODE_E; 204 205/* Attribute of the vertical synchronization signal */ 206typedef enum hiVI_VSYNC_E { 207 VI_VSYNC_FIELD = 0, /* Field/toggle mode:a signal reversal means a new frame or a field */ 208 VI_VSYNC_PULSE, /* Pusle/effective mode:a pusle or an effective signal means a new frame or a field */ 209 210 VI_VSYNC_BUTT 211} VI_VSYNC_E; 212 213/* Polarity of the vertical synchronization signal */ 214typedef enum hiVI_VSYNC_NEG_E { 215 VI_VSYNC_NEG_HIGH = 0, /* if VIU_VSYNC_E = VIU_VSYNC_FIELD, then the vertical synchronization signal of 216 even field is high-level, 217 if VIU_VSYNC_E = VIU_VSYNC_PULSE,then the vertical synchronization 218 pulse is positive pulse. */ 219 VI_VSYNC_NEG_LOW, /* if VIU_VSYNC_E = VIU_VSYNC_FIELD, then the vertical synchronization signal 220 of even field is low-level, 221 if VIU_VSYNC_E = VIU_VSYNC_PULSE,then the vertical synchronization 222 pulse is negative pulse. */ 223 VI_VSYNC_NEG_BUTT 224} VI_VSYNC_NEG_E; 225 226/* Attribute of the horizontal synchronization signal */ 227typedef enum hiVI_HSYNC_E { 228 VI_HSYNC_VALID_SINGNAL = 0, /* the horizontal synchronization is valid signal mode */ 229 VI_HSYNC_PULSE, /* the horizontal synchronization is pulse mode, a new pulse means 230 the beginning of a new line */ 231 232 VI_HSYNC_BUTT 233} VI_HSYNC_E; 234 235/* Polarity of the horizontal synchronization signal */ 236typedef enum hiVI_HSYNC_NEG_E { 237 VI_HSYNC_NEG_HIGH = 0, /* if VI_HSYNC_E = VI_HSYNC_VALID_SINGNAL, then the valid horizontal 238 synchronization signal is high-level; 239 if VI_HSYNC_E = VI_HSYNC_PULSE,then the horizontal synchronization 240 pulse is positive pulse */ 241 VI_HSYNC_NEG_LOW, /* if VI_HSYNC_E = VI_HSYNC_VALID_SINGNAL, then the valid horizontal 242 synchronization signal is low-level; 243 if VI_HSYNC_E = VI_HSYNC_PULSE, then the horizontal synchronization 244 pulse is negative pulse */ 245 VI_HSYNC_NEG_BUTT 246} VI_HSYNC_NEG_E; 247 248/* Attribute of the valid vertical synchronization signal */ 249typedef enum hiVI_VSYNC_VALID_E { 250 VI_VSYNC_NORM_PULSE = 0, /* the vertical synchronization is pusle mode, a pusle means a new frame or field */ 251 VI_VSYNC_VALID_SINGAL, /* the vertical synchronization is effective mode, a effective signal 252 means a new frame or field */ 253 254 VI_VSYNC_VALID_BUTT 255} VI_VSYNC_VALID_E; 256 257/* Polarity of the valid vertical synchronization signal */ 258typedef enum hiVI_VSYNC_VALID_NEG_E { 259 VI_VSYNC_VALID_NEG_HIGH = 0, /* if VI_VSYNC_VALID_E = VI_VSYNC_NORM_PULSE, a positive pulse means vertical 260 synchronization pulse; 261 if VI_VSYNC_VALID_E = VI_VSYNC_VALID_SINGAL, the valid vertical synchronization 262 signal is high-level */ 263 VI_VSYNC_VALID_NEG_LOW, /* if VI_VSYNC_VALID_E = VI_VSYNC_NORM_PULSE, a negative pulse 264 means vertical synchronization pulse; 265 if VI_VSYNC_VALID_E = VI_VSYNC_VALID_SINGAL, the valid vertical 266 synchronization signal is low-level */ 267 VI_VSYNC_VALID_NEG_BUTT 268} VI_VSYNC_VALID_NEG_E; 269 270/* Blank information of the input timing */ 271typedef struct hiVI_TIMING_BLANK_S { 272 HI_U32 u32HsyncHfb; /* RW;Horizontal front blanking width */ 273 HI_U32 u32HsyncAct; /* RW;Horizontal effetive width */ 274 HI_U32 u32HsyncHbb; /* RW;Horizontal back blanking width */ 275 HI_U32 u32VsyncVfb; /* RW;Vertical front blanking height of one frame or odd-field frame picture */ 276 HI_U32 u32VsyncVact; /* RW;Vertical effetive width of one frame or odd-field frame picture */ 277 HI_U32 u32VsyncVbb; /* RW;Vertical back blanking height of one frame or odd-field frame picture */ 278 HI_U32 u32VsyncVbfb; /* RW;Even-field vertical front blanking height when input mode is interlace 279 (invalid when progressive input mode) */ 280 HI_U32 u32VsyncVbact; /* RW;Even-field vertical effetive width when input mode is interlace 281 (invalid when progressive input mode) */ 282 HI_U32 u32VsyncVbbb; /* RW;Even-field vertical back blanking height when input mode is interlace 283 (invalid when progressive input mode) */ 284} VI_TIMING_BLANK_S; 285 286/* synchronization information about the BT.601 or DC timing */ 287typedef struct hiVI_SYNC_CFG_S { 288 VI_VSYNC_E enVsync; 289 VI_VSYNC_NEG_E enVsyncNeg; 290 VI_HSYNC_E enHsync; 291 VI_HSYNC_NEG_E enHsyncNeg; 292 VI_VSYNC_VALID_E enVsyncValid; 293 VI_VSYNC_VALID_NEG_E enVsyncValidNeg; 294 VI_TIMING_BLANK_S stTimingBlank; 295} VI_SYNC_CFG_S; 296 297/* the highest bit of the BT.656 timing reference code */ 298typedef enum hiVI_BT656_FIXCODE_E { 299 VI_BT656_FIXCODE_1 = 0, /* The highest bit of the EAV/SAV data over the BT.656 protocol is always 1. */ 300 VI_BT656_FIXCODE_0, /* The highest bit of the EAV/SAV data over the BT.656 protocol is always 0. */ 301 302 VI_BT656_FIXCODE_BUTT 303} VI_BT656_FIXCODE_E; 304 305/* Polarity of the field indicator bit (F) of the BT.656 timing reference code */ 306typedef enum hiVI_BT656_FIELD_POLAR_E { 307 VI_BT656_FIELD_POLAR_STD = 0, /* the standard BT.656 mode,the first filed F=0,the second filed F=1 */ 308 VI_BT656_FIELD_POLAR_NSTD, /* the non-standard BT.656 mode,the first filed F=1,the second filed F=0 */ 309 310 VI_BT656_FIELD_POLAR_BUTT 311} VI_BT656_FIELD_POLAR_E; 312 313/* synchronization information about the BT.656 */ 314typedef struct hiVI_BT656_SYNC_CFG_S { 315 VI_BT656_FIXCODE_E enFixCode; 316 VI_BT656_FIELD_POLAR_E enFieldPolar; 317} VI_BT656_SYNC_CFG_S; 318 319/* Input data type */ 320typedef enum hiVI_DATA_TYPE_E { 321 VI_DATA_TYPE_YUV = 0, 322 VI_DATA_TYPE_RGB, 323 324 VI_DATA_TYPE_BUTT 325} VI_DATA_TYPE_E; 326 327typedef enum hiVI_REPHASE_MODE_E { 328 VI_REPHASE_MODE_NONE = 0, 329 VI_REPHASE_MODE_SKIP_1_2, /* skip 1/2 */ 330 VI_REPHASE_MODE_SKIP_1_3, /* skip 1/3 */ 331 VI_REPHASE_MODE_BINNING_1_2, /* binning 1/2 */ 332 VI_REPHASE_MODE_BINNING_1_3, /* binning 1/3 */ 333 334 VI_REPHASE_MODE_BUTT 335} VI_REPHASE_MODE_E; 336 337typedef struct hiVI_BAS_REPHASE_ATTR_S { 338 VI_REPHASE_MODE_E enHRephaseMode; 339 VI_REPHASE_MODE_E enVRephaseMode; 340} VI_BAS_REPHASE_ATTR_S; 341 342/* Attribute of bas scale */ 343typedef struct hiVI_BAS_SCALE_ATTR_S { 344 SIZE_S stBasSize; /* RW;bayer scale size. */ 345} VI_BAS_SCALE_ATTR_S; 346 347/* Attribute of bayer scale */ 348typedef struct hiVI_BAS_ATTR_S { 349 VI_BAS_SCALE_ATTR_S stSacleAttr; 350 VI_BAS_REPHASE_ATTR_S stRephaseAttr; 351} VI_BAS_ATTR_S; 352 353/* Attribute of wdr */ 354typedef struct hiVI_WDR_ATTR_S { 355 WDR_MODE_E enWDRMode; /* RW; WDR mode. */ 356 HI_U32 u32CacheLine; /* RW; WDR cache line. */ 357} VI_WDR_ATTR_S; 358 359/* the extended attributes of VI device */ 360typedef struct hiVI_DEV_ATTR_EX_S { 361 VI_INPUT_MODE_E enInputMode; /* RW;Input mode */ 362 VI_WORK_MODE_E enWorkMode; /* RW; Work mode */ 363 364 VI_COMBINE_MODE_E enCombineMode; /* RW;Y/C composite or separation mode */ 365 VI_COMPONENT_MODE_E enComponentMode; /* RW;Component mode (single-component or dual-component) */ 366 VI_CLK_EDGE_E enClkEdge; /* RW;Clock edge mode (sampling on the rising or 367 falling edge) */ 368 369 HI_U32 au32ComponentMask[VI_COMPMASK_NUM]; /* RW;Component mask */ 370 371 VI_SCAN_MODE_E enScanMode; /* RW;Input scanning mode (progressive or interlaced) */ 372 HI_S32 as32AdChnId[VI_MAX_ADCHN_NUM]; /* RW;AD channel ID. Typically, the default 373 value -1 is recommended */ 374 375 VI_YUV_DATA_SEQ_E enDataSeq; /* RW;Input data sequence (only the YUV format is supported) */ 376 VI_SYNC_CFG_S stSynCfg; /* RW;Sync timing. This member must be configured in BT. 377 601 mode or DC mode */ 378 379 VI_BT656_SYNC_CFG_S stBT656SynCfg; /* RW;Sync timing. This member must be configured in BT. 380 656 mode */ 381 382 VI_DATA_TYPE_E enInputDataType; /* RW;RGB: CSC-709 or CSC-601, PT YUV444 disable; 383 YUV: default yuv CSC coef PT YUV444 enable. */ 384 385 HI_BOOL bDataReverse; /* RW;Data reverse */ 386 387 SIZE_S stSize; /* RW;Input size */ 388 389 VI_BAS_ATTR_S stBasAttr; /* RW;Attribute of BAS */ 390 391 VI_WDR_ATTR_S stWDRAttr; /* RW;Attribute of WDR */ 392 393 DATA_RATE_E enDataRate; /* RW;Data rate of Device */ 394} VI_DEV_ATTR_EX_S; 395 396/* The attributes of a VI device */ 397typedef struct hiVI_DEV_ATTR_S { 398 VI_INTF_MODE_E enIntfMode; /* RW;Interface mode */ 399 VI_WORK_MODE_E enWorkMode; /* RW;Work mode */ 400 401 HI_U32 au32ComponentMask[VI_COMPMASK_NUM]; /* RW;Component mask */ 402 VI_SCAN_MODE_E enScanMode; /* RW;Input scanning mode (progressive or interlaced) */ 403 HI_S32 as32AdChnId[VI_MAX_ADCHN_NUM]; /* RW;AD channel ID. Typically, the default value -1 404 is recommended */ 405 406 /* The below members must be configured in BT.601 mode or DC mode and are invalid in other modes */ 407 VI_YUV_DATA_SEQ_E enDataSeq; /* RW;Input data sequence (only the YUV format is supported) */ 408 VI_SYNC_CFG_S stSynCfg; /* RW;Sync timing. This member must be configured in BT. 409 601 mode or DC mode */ 410 411 VI_DATA_TYPE_E enInputDataType; /* RW;RGB: CSC-709 or CSC-601, PT YUV444 disable; YUV: default 412 yuv CSC coef PT YUV444 enable. */ 413 414 HI_BOOL bDataReverse; /* RW;Data reverse */ 415 416 SIZE_S stSize; /* RW;Input size */ 417 418 VI_BAS_ATTR_S stBasAttr; /* RW;Attribute of BAS */ 419 420 VI_WDR_ATTR_S stWDRAttr; /* RW;Attribute of WDR */ 421 422 DATA_RATE_E enDataRate; /* RW;Data rate of Device */ 423} VI_DEV_ATTR_S; 424 425/* Information of pipe binded to device */ 426typedef struct hiVI_DEV_BIND_PIPE_S { 427 HI_U32 u32Num; /* RW;Range [1,VI_MAX_PHY_PIPE_NUM] */ 428 VI_PIPE PipeId[VI_MAX_PHY_PIPE_NUM]; /* RW;Array of pipe ID */ 429} VI_DEV_BIND_PIPE_S; 430 431/* Source of 3DNR reference frame */ 432typedef enum hiVI_NR_REF_SOURCE_E { 433 VI_NR_REF_FROM_RFR = 0, /* Reference frame from reconstruction frame */ 434 VI_NR_REF_FROM_CHN0, /* Reference frame from CHN0's frame */ 435 436 VI_NR_REF_FROM_BUTT 437} VI_NR_REF_SOURCE_E; 438 439typedef enum hiVI_PIPE_BYPASS_MODE_E { 440 VI_PIPE_BYPASS_NONE, 441 VI_PIPE_BYPASS_FE, 442 VI_PIPE_BYPASS_BE, 443 444 VI_PIPE_BYPASS_BUTT 445} VI_PIPE_BYPASS_MODE_E; 446 447/* The attributes of 3DNR */ 448typedef struct hiVI_NR_ATTR_S { 449 PIXEL_FORMAT_E enPixFmt; /* RW;Pixel format of reference frame */ 450 DATA_BITWIDTH_E enBitWidth; /* RW;Bit Width of reference frame */ 451 VI_NR_REF_SOURCE_E enNrRefSource; /* RW;Source of 3DNR reference frame */ 452 COMPRESS_MODE_E enCompressMode; /* RW;Reference frame compress mode */ 453} VI_NR_ATTR_S; 454 455/* The attributes of pipe */ 456typedef struct hiVI_PIPE_ATTR_S { 457 VI_PIPE_BYPASS_MODE_E enPipeBypassMode; 458 HI_BOOL bYuvSkip; /* RW;YUV skip enable */ 459 HI_BOOL bIspBypass; /* RW;Range:[0, 1];ISP bypass enable */ 460 HI_U32 u32MaxW; /* RW;Range[VI_PIPE_MIN_WIDTH, VI_PIPE_MAX_WIDTH];Maximum width */ 461 HI_U32 u32MaxH; /* RW;Range[VI_PIPE_MIN_HEIGHT, VI_PIPE_MAX_HEIGHT];Maximum height */ 462 PIXEL_FORMAT_E enPixFmt; /* RW;Pixel format */ 463 COMPRESS_MODE_E enCompressMode; /* RW;Range:[0, 4];Compress mode. */ 464 DATA_BITWIDTH_E enBitWidth; /* RW;Range:[0, 4];Bit width */ 465 HI_BOOL bNrEn; /* RW;Range:[0, 1];3DNR enable */ 466 VI_NR_ATTR_S stNrAttr; /* RW;Attribute of 3DNR */ 467 HI_BOOL bSharpenEn; /* RW;Range:[0, 1];Sharpen enable */ 468 FRAME_RATE_CTRL_S stFrameRate; /* RW;Frame rate */ 469 HI_BOOL bDiscardProPic; /* RW;Range:[0, 1];when professional mode snap, whether to discard 470 long exposure picture in the video pipe. */ 471} VI_PIPE_ATTR_S; 472 473typedef enum hiVI_STITCH_ISP_CFG_MODE_E { 474 VI_STITCH_ISP_CFG_NORMAL = 0, 475 VI_STITCH_ISP_CFG_SYNC, 476 VI_STITCH_ISP_CFG_BUTT 477} VI_STITCH_ISP_CFG_MODE_E; 478 479/* Information of stitch group */ 480typedef struct hiVI_STITCH_GRP_ATTR_S { 481 HI_BOOL bStitch; 482 VI_STITCH_ISP_CFG_MODE_E enMode; 483 HI_U32 u32MaxPTSGap; /* RW;MAX PTS Gap between frame of pipe,unit:us */ 484 HI_U32 u32PipeNum; /* RW;Range [2, VI_MAX_PIPE_NUM] */ 485 VI_PIPE PipeId[VI_MAX_PIPE_NUM]; /* RW;Array of pipe ID */ 486} VI_STITCH_GRP_ATTR_S; 487 488typedef enum hiVI_MONO_COLOR_RATIO_E { 489 VI_MONO_COLOR_RATIO_1_1 = 0, /* The ratio of mono pic to color pic is 1:1 */ 490 VI_MONO_COLOR_RATIO_2_1, /* The ratio of mono pic to color pic is 2:1 */ 491 VI_MONO_COLOR_RATIO_3_1, /* The ratio of mono pic to color pic is 3:1 */ 492 VI_MONO_COLOR_RATIO_1_2, /* The ratio of mono pic to color pic is 1:2 */ 493 VI_MONO_COLOR_RATIO_1_3, /* The ratio of mono pic to color pic is 1:3 */ 494 VI_MONO_COLOR_RATIO_BUTT 495} VI_MONO_COLOR_RATIO_E; 496 497/* Information of mcf group */ 498typedef struct hiVI_MCF_GRP_ATTR_S { 499 HI_BOOL bEnable; 500 VI_MONO_COLOR_RATIO_E enRatio; 501 VI_PIPE MonoPipe; 502 VI_PIPE ColorPipe; 503} VI_MCF_GRP_ATTR_S; 504 505typedef enum hiVI_PIPE_REPEAT_MODE_E { 506 VI_PIPE_REPEAT_NONE = 0, 507 VI_PIPE_REPEAT_ONCE = 1, 508 VI_PIPE_REPEAT_BUTT 509} VI_PIPE_REPEAT_MODE_E; 510 511typedef struct { 512 HI_U8 IES; /* RW; Range:[0, 255];Format 8.0;the absolute strength of image enhancement for edge */ 513 HI_U8 IESS; /* RW; Range:[0, 255];Format 8.0;the absolute strength of image enhancement for 514 texture and shadow */ 515 HI_U16 IEDZ; /* RW; Range:[0, 8192];Format 14.0;the threshold of image enhancement 516 for controlling noise */ 517} tV59aIEy; 518 519typedef struct { 520 HI_U8 SBF : 2; /* RW; Range:[0, 3];Format 2.0;the band type of spatial filter, notice: SBF0, SBF1 521 range is [2, 3];SBF2,SBF3,SBF4 range is [0,3], where SBF4 is related to SBFk */ 522 HI_U8 STR : 4; /* RW; Range:[0, 13];Format 4.0;the relative strength of spatial filter refer to 523 the previous frame */ 524 HI_U8 STHp : 2; /* RW; Range:[0, 2];Format 2.0;Not recommended for debugging */ 525 HI_U8 SFT : 5; /* RW; Range:[0, 31];Format 5.0;Not recommended for debugging */ 526 HI_U8 kPro : 3; /* RW; Range:[0, 7];Format 3.0;notice: the kPro of SFy2 range is [0, 7], the kPro of 527 SFy3 range is [0, 4] */ 528 HI_U16 STH[3]; /* RW; Range:[0, 999];Format 10.0;the edge-preserve threshold for spatial filter */ 529 HI_U16 SBS[3]; /* RW; Range:[0, 9999];Format 14.0;the noise reduction strength of spatial filter 530 for the relative bright pixel */ 531 HI_U16 SDS[3]; /* RW; Range:[0, 9999];Format 14.0;the noise reduction strength of spatial filter 532 for the relative dark pixel */ 533} tV59aSFy; 534 535typedef struct { 536 HI_U16 MATH : 10; /* RW; Range:[0, 1023];Format 10.0;the motion detection threshold for temporal filter */ 537 HI_U16 MATE : 4; /* RW; Range:[0, 11];Format 4.0;the motion detection index of flat area 538 for temporal filter */ 539 HI_U16 MATW : 2; /* RW; Range:[0, 3];Format 2.0;the index of suppressing trailing for temporal filter */ 540 HI_U8 MASW : 4; /* RW; Range:[0, 12];Format 4.0;the index of suppressing raindrop noise 541 for temporal filter */ 542 HI_U8 MABW : 3; /* RW; Range:[0, 4];Format 3.0;the window of motion detection for temporal filter */ 543 HI_U8 MAXN : 1; /* RW; Range:[0, 1];Format 1.0;Not recommended for debugging */ 544} tV59aMDy; 545 546typedef struct { 547 HI_U8 TFR[4]; /* RW; Range:[0, 255];Format 8.0;the relative strength of temporal 548 filter for the static area */ 549 HI_U16 TDZ : 14; /* RW; Range:[0, 999];Format 10.0;the threshold of dead-area of temporal filter */ 550 HI_U16 TDX : 2; /* RW; Range:[0, 2];Format 2.0;Not recommended for debugging */ 551 HI_U16 TFS : 6; /* RW; Range:[0, 63];Format 6.0;the absolute strength of temporal filter */ 552 HI_U16 _rb1_ : 10; 553} tV59aTFy; 554 555typedef struct { 556 HI_U16 SFC : 10; /* RW; Range:[0, 999];Format 10.0;the strength of spatial filter for NRC0 */ 557 HI_U16 TFC : 6; /* RW; Range:[0, 63];Format 6.0;the strength of temporal filter for NRC0 */ 558 HI_U16 CSFS : 14; /* RW; Range:[0, 999];Format 10.0;the strength of spatial filter for NRC1 */ 559 HI_U16 CSFk : 2; /* RW; Range:[0, 3];Format 2.0;Not recommended for debugging */ 560 HI_U16 CTFS : 4; /* RW; Range:[0, 15];Format 4.0;the strength of temporal filter for NRC1 */ 561 HI_U16 CIIR : 1; /* RW; Range:[0, 1];Format 1.0;the mode of spatial filter for NRC1 */ 562 HI_U16 CTFR : 11; /* RW; Range:[0, 999];Format 10.0;the relative strength of temporal filter for NRC1 */ 563 HI_U8 MODE : 1; /* RW; Range: [0, 1]; The switch for new chroma denoise mode. */ 564 HI_U8 PRESFC : 6; /* RW; Range: [0, 32]; The strength for chroma pre spatial filter. */ 565 HI_U8 _rb1_ : 1; 566} tV59aNRc; 567 568/* 3DNR Spatial Filter: SFy0,SFy1,SFy2,SFy3; Temporal Filter:TFy0,TFy1;Chroma Noise Reduction: NRC0,NRC1 */ 569typedef struct { 570 tV59aIEy IEy; 571 tV59aSFy SFy[5]; 572 tV59aMDy MDy[2]; 573 tV59aTFy TFy[2]; 574 575 HI_U16 HdgType : 1; /* RW; Range:[0, 1];Format 1.0;the type of complexed mixed spatial filter whether 576 is SFi or SFk */ 577 HI_U16 BriType : 1; /* RW; Range:[0, 1];Format 1.0;the mode decide SFy3 whether is SFk type or SFi type */ 578 HI_U16 HdgMode : 2; /* RW; Range:[0, 3];Format 2.0;the mode decide complexed mixed spatial filter band 579 for flat area */ 580 HI_U16 kTab2 : 1; /* RW; Range:[0, 1];Format 1.0;the parameter decide SFy2 whether or not based on the image 581 absolute luminance */ 582 HI_U16 HdgWnd : 1; /* RW; Range:[0, 1];Format 1.0;the sampling window of complexed mixed spatial filter for 583 noise detection */ 584 HI_U16 kTab3 : 1; /* RW; Range:[0, 1];Format 1.0;the parameter decide SFy3 whether or not based on the image 585 absolute luminance */ 586 HI_U16 HdgSFR : 4; /* RW; Range:[0, 13];Format 4.0;the trend of the noise reduction of complexed mixed spatial 587 filter for flat area */ 588 HI_U16 nOut : 5; /* RW; Range:[0, 27];Format 5.0;the parameter for output intermediate result of SFy3 */ 589 HI_U8 HdgIES; /* RW; Range:[0, 255];Format 8.0;the strength of image enhancement for complexed 590 mixed spatial filter */ 591 HI_U8 nRef : 1; /* RW; Range:[0, 1];Format 1.0;Not recommended for debugging */ 592 593 HI_U8 IEyMode : 1; /* RW; Range:[0, 1];Format 1.0;the image enhancement mode selection. */ 594 595 HI_U8 _rb1_ : 6; 596 HI_U8 IEyEx[4]; /* RW; Range:[0, 255];Format 8.0;the image enhancement strength for different frequency. */ 597 598 HI_U8 SFRi[4]; /* RW; Range:[0, 255];Format 8.0;the relative strength of SFy3 when the filter type is SFi */ 599 HI_U8 SFRk[4]; /* RW; Range:[0, 255];Format 8.0;the relative strength of SFy3 when the filter type is SFk */ 600 HI_U16 SBSk2[32]; /* RW; Range:[0, 9999];Format 14.0;the noise reduction strength of SFy2 for the 601 relative bright pixel based on the image absolute luminance */ 602 HI_U16 SBSk3[32]; /* RW; Range:[0, 9999];Format 14.0;the noise reduction strength of SFy3 for the 603 relative bright pixel based on the image absolute luminance */ 604 HI_U16 SDSk2[32]; /* RW; Range:[0, 9999];Format 14.0;the noise reduction strength of SFy2 for the 605 relative dark pixel based on the image absolute luminance */ 606 HI_U16 SDSk3[32]; /* RW; Range:[0, 9999];Format 14.0;the noise reduction strength of SFy3 for the 607 relative dark pixel based on the image absolute luminance */ 608 HI_U16 BriThr[16]; /* RW; Range:[0, 1024];Format 11.0;the threshold decide SFy3 choose the SFi type filter 609 or SFk type filter in dark and bright area */ 610 611 tV59aNRc NRc; 612} VI_PIPE_NRX_PARAM_V1_S; 613 614typedef enum hiVI_NR_VERSION_E { 615 VI_NR_V1 = 1, 616 VI_NR_V2 = 2, 617 VI_NR_V3 = 3, 618 VI_NR_V4 = 4, 619 VI_NR_BUTT 620} VI_NR_VERSION_E; 621 622typedef struct hiNRX_PARAM_MANUAL_V1_S { 623 VI_PIPE_NRX_PARAM_V1_S stNRXParamV1; 624} NRX_PARAM_MANUAL_V1_S; 625 626typedef struct hiNRX_PARAM_AUTO_V1_S { 627 HI_U32 u32ParamNum; 628 HI_U32 ATTRIBUTE *pau32ISO; 629 VI_PIPE_NRX_PARAM_V1_S ATTRIBUTE *pastNRXParamV1; 630} NRX_PARAM_AUTO_V1_S; 631 632typedef struct hiNRX_PARAM_V1_S { 633 OPERATION_MODE_E enOptMode; /* RW;Adaptive NR */ 634 NRX_PARAM_MANUAL_V1_S stNRXManualV1; /* RW;NRX V1 param for manual */ 635 NRX_PARAM_AUTO_V1_S stNRXAutoV1; /* RW;NRX V1 param for auto */ 636} NRX_PARAM_V1_S; 637 638typedef struct { 639 HI_U8 IES0, IES1, IES2, IES3; /* IES0~4 ; Range: [0, 255]; The gains of edge and texture enhancement. 640 0~3 for different frequency response. */ 641 HI_U16 IEDZ : 10, _rb_ : 6; /* IEDZ ; Range: [0, 999]; The threshold to control the generated artifacts. */ 642} tV500_VI_IEy; 643 644typedef struct { 645 HI_U8 SPN6 : 3, SFR : 5; /* SPN6; Range: [0, 5]; The selection of filters to be mixed for NO.6 filter. */ 646 /* SFR ; Range: [0, 31]; The relative NR strength in the SFi and SFk filter. */ 647 HI_U8 SBN6 : 3, PBR6 : 5; /* SBN6; Range: [0, 5]; The selection of filters to be mixed for NO.6 filter. */ 648 /* PBR6; Range: [0, 16]; The mix ratio between SPN6 and SBN6. */ 649 HI_U16 SRT0 : 5, SRT1 : 5, JMODE : 3, DeIdx : 3; /* JMODE; Range: [0, 4]; The selection modes 650 for the blending of spatial filters */ 651 /* STR0, STR1; Range: [0, 16]; The blending ratio 652 of different filters. (Used in serial filtering mode (SFM).) */ 653 /* DeIdx; Range: [3, 6]; The selection number of 654 filters that textures and details will be added to. */ 655 HI_U8 DeRate, SFR6[3]; /* DeRate; Range: [0, 255]; The enhancement strength 656 for the SFM (When DeRate > 0, the SFM will be activated) */ 657 /* SFR6; Range: [0, 31]; The relative NR strength 658 for NO.6 filter. (Effective when JMODE = 4) */ 659 HI_U8 SFS1, SFT1, SBR1; /* SFS1, SFT1, SBR1; Range: [0, 255]; The NR strength 660 parameters for NO.1 filter. */ 661 HI_U8 SFS2, SFT2, SBR2; /* SFS2, SFT2, SBR2; Range: [0, 255]; The NR strength 662 parameters for NO.2 filter. */ 663 HI_U8 SFS4, SFT4, SBR4; /* SFS4, SFT4, SBR4; Range: [0, 255]; The NR strength 664 parameters for NO.3 and NO.4 filters. */ 665 666 HI_U16 STH1 : 9, SFN1 : 3, NRyEn : 1, SFN0 : 3; /* STH1~3; Range: [0, 511]; The thresholds for protection 667 of edges from blurring */ 668 /* NRyEn ; Range: [0, 1]; The NR switches */ 669 HI_U16 STH2 : 9, SFN2 : 3, BWSF4 : 1, kMode : 3; /* SFN0~3; Range: [0, 6]; Filter selection for different 670 image areas based on STH1~3. */ 671 /* BWSF4 ; Range: [0, 1]; The NR window size for the 672 NO.3 and NO.4 filters. */ 673 HI_U16 STH3 : 9, SFN3 : 3, TriTh : 1, _rb0_ : 3; /* KMode ; Range: [0, 3]; The denoise mode based 674 on image brightness. */ 675 /* Trith ; Range: [0, 1]; The switch to choose 3 STH 676 threshold or 2 STH threshold */ 677} tV500_VI_SFy; 678 679typedef struct { 680 tV500_VI_IEy IEy; 681 tV500_VI_SFy SFy; 682} VI_PIPE_NRX_PARAM_V2_S; 683 684typedef struct hiNRX_PARAM_MANUAL_V2_S { 685 VI_PIPE_NRX_PARAM_V2_S stNRXParamV2; 686} NRX_PARAM_MANUAL_V2_S; 687 688typedef struct hiNRX_PARAM_AUTO_V2_S { 689 HI_U32 u32ParamNum; 690 HI_U32 ATTRIBUTE *pau32ISO; 691 VI_PIPE_NRX_PARAM_V2_S ATTRIBUTE *pastNRXParamV2; 692} NRX_PARAM_AUTO_V2_S; 693 694typedef struct hiNRX_PARAM_V2_S { 695 OPERATION_MODE_E enOptMode; /* RW;Adaptive NR */ 696 NRX_PARAM_MANUAL_V2_S stNRXManualV2; /* RW;NRX V2 param for manual */ 697 NRX_PARAM_AUTO_V2_S stNRXAutoV2; /* RW;NRX V2 param for auto */ 698} NRX_PARAM_V2_S; 699 700typedef struct hiVI_PIPE_NRX_PARAM_S { 701 VI_NR_VERSION_E enNRVersion; /* RW;3DNR Version */ 702 union { 703 NRX_PARAM_V1_S stNRXParamV1; /* RW;3DNR X param version 1 */ 704 NRX_PARAM_V2_S stNRXParamV2; /* RW;3DNR X param version 2 */ 705 }; 706} VI_PIPE_NRX_PARAM_S; 707 708/* The attributes of channel */ 709typedef struct hiVI_CHN_ATTR_S { 710 SIZE_S stSize; /* RW;Channel out put size */ 711 PIXEL_FORMAT_E enPixelFormat; /* RW;Pixel format */ 712 DYNAMIC_RANGE_E enDynamicRange; /* RW;Dynamic Range */ 713 VIDEO_FORMAT_E enVideoFormat; /* RW;Video format */ 714 COMPRESS_MODE_E enCompressMode; /* RW;256B Segment compress or no compress. */ 715 HI_BOOL bMirror; /* RW;Mirror enable */ 716 HI_BOOL bFlip; /* RW;Flip enable */ 717 HI_U32 u32Depth; /* RW;Range [0,8];Depth */ 718 FRAME_RATE_CTRL_S stFrameRate; /* RW;Frame rate */ 719} VI_CHN_ATTR_S; 720 721/* The status of pipe */ 722typedef struct hiVI_PIPE_STATUS_S { 723 HI_BOOL bEnable; /* RO;Whether this pipe is enabled */ 724 HI_U32 u32IntCnt; /* RO;The video frame interrupt count */ 725 HI_U32 u32FrameRate; /* RO;Current frame rate */ 726 HI_U32 u32LostFrame; /* RO;Lost frame count */ 727 HI_U32 u32VbFail; /* RO;Video buffer malloc failure */ 728 SIZE_S stSize; /* RO;Current pipe output size */ 729} VI_PIPE_STATUS_S; 730 731/* VS signal output mode */ 732typedef enum hiVI_VS_SIGNAL_MODE_E { 733 VI_VS_SIGNAL_ONCE = 0, /* output one time */ 734 VI_VS_SIGNAL_FREQ, /* output frequently */ 735 736 VI_VS_SIGNAL_MODE_BUTT 737} VI_VS_SIGNAL_MODE_E; 738 739/* The attributes of VS signal */ 740typedef struct hiVI_VS_SIGNAL_ATTR_S { 741 VI_VS_SIGNAL_MODE_E enMode; /* RW;output one time, output frequently */ 742 HI_U32 u32StartTime; /* RW;output start time,unit: sensor pix clk. */ 743 HI_U32 u32Duration; /* RW;output high duration, unit: sensor pix clk. */ 744 HI_U32 u32CapFrmIndex; /* RW;VS signal will be output after trigger by which vframe, 745 default is 0. */ 746 HI_U32 u32Interval; /* RW;output frequently interval, unit: frame */ 747} VI_VS_SIGNAL_ATTR_S; 748 749typedef struct hiBNR_DUMP_ATTR_S { 750 HI_BOOL bEnable; 751 HI_U32 u32Depth; 752} BNR_DUMP_ATTR_S; 753 754typedef enum hiVI_EXT_CHN_SOURCE_E { 755 VI_EXT_CHN_SOURCE_TAIL, 756 VI_EXT_CHN_SOURCE_HEAD, 757 758 VI_EXT_CHN_SOURCE_BUTT 759} VI_EXT_CHN_SOURCE_E; 760 761typedef struct hiVI_EXT_CHN_ATTR_S { 762 VI_EXT_CHN_SOURCE_E enSource; 763 VI_CHN s32BindChn; /* RW;Range [VI_CHN0, VI_MAX_PHY_CHN_NUM);The channel num which extend 764 channel will bind to */ 765 SIZE_S stSize; /* RW;Channel out put size */ 766 PIXEL_FORMAT_E enPixFormat; /* RW;Pixel format */ 767 DYNAMIC_RANGE_E enDynamicRange; /* RW;Dynamic Range */ 768 COMPRESS_MODE_E enCompressMode; /* RW;256B Segment compress or no compress. */ 769 HI_U32 u32Depth; /* RW;Range [0,8];Depth */ 770 FRAME_RATE_CTRL_S stFrameRate; /* RW;Frame rate */ 771} VI_EXT_CHN_ATTR_S; 772 773typedef enum hiVI_CROP_COORDINATE_E { 774 VI_CROP_RATIO_COOR = 0, /* Ratio coordinate */ 775 VI_CROP_ABS_COOR, /* Absolute coordinate */ 776 VI_CROP_BUTT 777} VI_CROP_COORDINATE_E; 778 779/* Information of chn crop */ 780typedef struct hiVI_CROP_INFO_S { 781 HI_BOOL bEnable; /* RW;CROP enable */ 782 VI_CROP_COORDINATE_E enCropCoordinate; /* RW;Coordinate mode of the crop start point */ 783 RECT_S stCropRect; /* RW;CROP rectangular */ 784} VI_CROP_INFO_S; 785 786/* The attributes of LDC */ 787typedef struct hiVI_LDC_ATTR_S { 788 HI_BOOL bEnable; /* RW;Range [0,1];Whether LDC is enbale */ 789 LDC_ATTR_S stAttr; 790} VI_LDC_ATTR_S; 791 792/* The attributes of LDCV2 */ 793typedef struct hiVI_LDCV2_ATTR_S { 794 HI_BOOL bEnable; /* RW;Whether LDC is enbale */ 795 LDCV2_ATTR_S stAttr; 796} VI_LDCV2_ATTR_S; 797 798/* The attributes of LDCV3 */ 799typedef struct hiVI_LDCV3_ATTR_S { 800 HI_BOOL bEnable; /* RW;Whether LDC is enbale */ 801 LDCV3_ATTR_S stAttr; 802} VI_LDCV3_ATTR_S; 803 804typedef struct hiVI_ROTATION_EX_ATTR_S { 805 HI_BOOL bEnable; /* RW;Range [0,1];Whether ROTATE_EX_S is enbale */ 806 ROTATION_EX_S stRotationEx; 807} VI_ROTATION_EX_ATTR_S; 808 809/* The status of chn */ 810typedef struct hiVI_CHN_STATUS_S { 811 HI_BOOL bEnable; /* RO;Whether this channel is enabled */ 812 HI_U32 u32FrameRate; /* RO;current frame rate */ 813 HI_U32 u32LostFrame; /* RO;Lost frame count */ 814 HI_U32 u32VbFail; /* RO;Video buffer malloc failure */ 815 SIZE_S stSize; /* RO;chn output size */ 816} VI_CHN_STATUS_S; 817 818typedef struct hiVI_PMF_ATTR_S { 819 HI_BOOL bEnable; /* RW;Whether PMF is enable */ 820 SIZE_S stDestSize; /* RW;Target size */ 821 HI_S64 as64PMFCoef[VI_PMFCOEF_NUM]; /* RW; Array of PMF coefficients */ 822} VI_PMF_ATTR_S; 823 824typedef enum hiVI_DUMP_TYPE_E { 825 VI_DUMP_TYPE_RAW = 0, 826 VI_DUMP_TYPE_YUV = 1, 827 VI_DUMP_TYPE_IR = 2, 828 VI_DUMP_TYPE_BUTT 829} VI_DUMP_TYPE_E; 830 831typedef struct hiVI_DUMP_ATTR_S { 832 HI_BOOL bEnable; /* RW;Whether dump is enable */ 833 HI_U32 u32Depth; /* RW;Range [0,8];Depth */ 834 VI_DUMP_TYPE_E enDumpType; 835} VI_DUMP_ATTR_S; 836 837typedef enum hiVI_PIPE_FRAME_SOURCE_E { 838 VI_PIPE_FRAME_SOURCE_DEV = 0, /* RW;Source from dev */ 839 VI_PIPE_FRAME_SOURCE_USER_FE, /* RW;User send to FE */ 840 VI_PIPE_FRAME_SOURCE_USER_BE, /* RW;User send to BE */ 841 842 VI_PIPE_FRAME_SOURCE_BUTT 843} VI_PIPE_FRAME_SOURCE_E; 844 845typedef struct hi_VI_RAW_INFO_S { 846 VIDEO_FRAME_INFO_S stVideoFrame; 847 ISP_CONFIG_INFO_S stIspInfo; 848} VI_RAW_INFO_S; 849 850/* module params */ 851typedef struct hiVI_MOD_PARAM_S { 852 HI_S32 s32DetectErrFrame; 853 HI_U32 u32DropErrFrame; 854 VB_SOURCE_E enViVbSource; 855} VI_MOD_PARAM_S; 856 857typedef struct hiVI_DEV_TIMING_ATTR_S { 858 HI_BOOL bEnable; /* RW;Range:[0,1];Whether enable VI generate timing */ 859 HI_S32 s32FrmRate; /* RW;Range:(0,0xffffff];;Generate timing Frame rate */ 860} VI_DEV_TIMING_ATTR_S; 861 862typedef struct hiVI_EARLY_INTERRUPT_S { 863 HI_BOOL bEnable; 864 HI_U32 u32LineCnt; 865} VI_EARLY_INTERRUPT_S; 866 867#ifdef __cplusplus 868#if __cplusplus 869} 870#endif 871#endif /* __cplusplus */ 872 873#endif /* HI_COMM_VI_H */ 874