1/* 2 * Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without modification, 5 * are permitted provided that the following conditions are met: 6 * 7 * 1. Redistributions of source code must retain the above copyright notice, this list of 8 * conditions and the following disclaimer. 9 * 10 * 2. Redistributions in binary form must reproduce the above copyright notice, this list 11 * of conditions and the following disclaimer in the documentation and/or other materials 12 * provided with the distribution. 13 * 14 * 3. Neither the name of the copyright holder nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific prior written 16 * permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 20 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 22 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 23 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 24 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 25 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 26 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 27 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 28 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#ifndef _SOC_H 32#define _SOC_H 33 34#define IRQn_Type int 35 36#define __CM55_REV 0x0001 37#define __NVIC_PRIO_BITS 3 38#define __Vendor_SysTickConfig 0 39#define __VTOR_PRESET 1 40#define __MPU_PRESENT 1 41#define __FPU_PRESENT 1 42#define __DSP_PRESENT 1 43#define ARM_MATH_HELIUM 44 45#define SysTick_IRQn (-1) 46#define PendSV_IRQn (-2) 47#define NonMaskableInt_IRQn (-14) 48#define MemoryManagement_IRQn (-12) 49#define BusFault_IRQn (-11) 50#define UsageFault_IRQn (-10) 51#define SVCall_IRQn (-5) 52 53#define UART0_RX_IRQn 43 54 55#define SYSCLK_FREQ 25000000 56 57#define UART0_BASE 0x49303000 58#define UART1_BASE 0x49304000 59#define UART2_BASE 0x49305000 60 61#define UART0_CLK_FREQ SYSCLK_FREQ 62#define UART0_BAUDRAT 115200 63 64#include "core_cm55.h" 65 66#endif 67 68