1/* 2 * Copyright (c) 2021 Huawei Device Co., Ltd. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 16#include "register_test.h" 17 18#include <bitset> 19 20using namespace testing::ext; 21using namespace std; 22using namespace OHOS::HiviewDFX; 23namespace OHOS { 24namespace Developtools { 25namespace HiPerf { 26class RegisterTest : public testing::Test { 27public: 28 static void SetUpTestCase(void); 29 static void TearDownTestCase(void); 30 void SetUp(); 31 void TearDown(); 32}; 33 34void RegisterTest::SetUpTestCase() {} 35 36void RegisterTest::TearDownTestCase() {} 37 38void RegisterTest::SetUp() {} 39 40void RegisterTest::TearDown() {} 41 42 43/** 44 * @tc.name: GetSupportedRegMask 45 * @tc.desc: 46 * @tc.type: FUNC 47 */ 48HWTEST_F(RegisterTest, GetSupportedRegMask, TestSize.Level1) 49{ 50 EXPECT_NE(GetSupportedRegMask(ArchType::ARCH_X86), GetSupportedRegMask(ArchType::ARCH_X86_64)); 51 EXPECT_NE(GetSupportedRegMask(ArchType::ARCH_ARM), GetSupportedRegMask(ArchType::ARCH_ARM64)); 52 EXPECT_EQ(GetSupportedRegMask(static_cast<ArchType>(100)), 53 std::numeric_limits<uint64_t>::max()); 54 EXPECT_EQ(GetSupportedRegMask(static_cast<ArchType>(-1)), std::numeric_limits<uint64_t>::max()); 55 56 std::bitset<64> regMasker; 57 regMasker = GetSupportedRegMask(ArchType::ARCH_X86); 58 EXPECT_EQ(regMasker.count(), PERF_REG_X86_32_MAX); 59 60 regMasker = GetSupportedRegMask(ArchType::ARCH_X86_64); 61 // dont support PERF_REG_X86_DS,PERF_REG_X86_ES,PERF_REG_X86_FS,PERF_REG_X86_GS 62 EXPECT_EQ(regMasker.count(), PERF_REG_X86_64_MAX - 4u); 63 64 regMasker = GetSupportedRegMask(ArchType::ARCH_ARM); 65 EXPECT_EQ(regMasker.count(), PERF_REG_ARM_MAX); 66 67 regMasker = GetSupportedRegMask(ArchType::ARCH_ARM64); 68 EXPECT_EQ(regMasker.count(), PERF_REG_ARM64_MAX); 69} 70 71/** 72 * @tc.name: RegisterGetIP 73 * @tc.desc: 74 * @tc.type: FUNC 75 */ 76HWTEST_F(RegisterTest, RegisterGetIP, TestSize.Level1) 77{ 78 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_X86), PERF_REG_X86_IP); 79 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_X86_64), PERF_REG_X86_IP); 80 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_ARM), PERF_REG_ARM_PC); 81 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_ARM64), PERF_REG_ARM64_PC); 82 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_UNKNOWN), std::numeric_limits<size_t>::max()); 83} 84 85/** 86 * @tc.name: RegisterGetSP 87 * @tc.desc: 88 * @tc.type: FUNC 89 */ 90HWTEST_F(RegisterTest, RegisterGetSP, TestSize.Level1) 91{ 92#if defined(target_cpu_x86_64) 93 EXPECT_EQ(RegisterGetSP(ArchType::ARCH_X86_64), PERF_REG_X86_IP); 94#elif defined(target_cpu_arm) 95 EXPECT_EQ(RegisterGetSP(ArchType::ARCH_ARM), PERF_REG_ARM_SP); 96#elif defined(target_cpu_arm64) 97 EXPECT_EQ(RegisterGetSP(ArchType::ARCH_ARM64), PERF_REG_ARM64_SP); 98#endif 99} 100 101/** 102 * @tc.name: RegisterGetValue 103 * @tc.desc: 104 * @tc.type: FUNC 105 */ 106HWTEST_F(RegisterTest, RegisterGetValue, TestSize.Level1) 107{ 108 uint64_t value = 0; 109 const u64 registers[4] = {1, 2, 3, 4}; 110 111 EXPECT_EQ(RegisterGetValue(value, registers, 0, sizeof(registers)), true); 112 EXPECT_EQ(RegisterGetValue(value, registers, sizeof(registers), sizeof(registers)), false); 113 EXPECT_EQ(RegisterGetValue(value, registers, -1, sizeof(registers)), false); 114 115 for (unsigned i = 0; i < sizeof(registers); i++) { 116 RegisterGetValue(value, registers, i, sizeof(registers)); 117 EXPECT_EQ(value, registers[i]); 118 } 119} 120 121/** 122 * @tc.name: RegisterGetSPValue 123 * @tc.desc: 124 * @tc.type: FUNC 125 */ 126HWTEST_F(RegisterTest, RegisterGetSPValue, TestSize.Level1) 127{ 128 uint64_t value = 0; 129 uint64_t value2 = 0; 130 u64 registers[PERF_REG_ARM64_MAX] = {1, 2, 3, 4}; 131 size_t sp = RegisterGetSP(BUILD_ARCH_TYPE); 132 registers[sp] = 0x1234; 133 134 EXPECT_EQ(RegisterGetValue(value, registers, sp, sizeof(registers)), 135 RegisterGetSPValue(value2, BUILD_ARCH_TYPE, registers, sizeof(registers))); 136 137 EXPECT_EQ(value, value2); 138} 139 140/** 141 * @tc.name: RegisterGetIPValue 142 * @tc.desc: 143 * @tc.type: FUNC 144 */ 145HWTEST_F(RegisterTest, RegisterGetIPValue, TestSize.Level1) 146{ 147 uint64_t value = 0; 148 uint64_t value2 = 0; 149 u64 registers[PERF_REG_ARM64_MAX] = {1, 2, 3, 4}; 150 size_t ip = RegisterGetIP(BUILD_ARCH_TYPE); 151 registers[ip] = 0x1234; 152 153 EXPECT_EQ(RegisterGetValue(value, registers, ip, sizeof(registers)), 154 RegisterGetIPValue(value2, BUILD_ARCH_TYPE, registers, sizeof(registers))); 155 156 EXPECT_EQ(value, value2); 157} 158 159/** 160 * @tc.name: RegisterGetName 161 * @tc.desc: 162 * @tc.type: FUNC 163 */ 164HWTEST_F(RegisterTest, RegisterGetName, TestSize.Level1) 165{ 166 for (unsigned i = 0; i < PERF_REG_ARM64_MAX; i++) { 167 EXPECT_EQ(RegisterGetName(i).empty(), false); 168 } 169} 170 171/** 172 * @tc.name: GetArchName 173 * @tc.desc: 174 * @tc.type: FUNC 175 */ 176HWTEST_F(RegisterTest, GetArchName, TestSize.Level1) 177{ 178 RegisterGetSP(ArchType::ARCH_ARM); 179 EXPECT_STREQ(GetArchName(ArchType::ARCH_ARM).c_str(), "ARM"); 180 RegisterGetSP(ArchType::ARCH_ARM64); 181 EXPECT_STREQ(GetArchName(ArchType::ARCH_ARM64).c_str(), "ARM64"); 182 RegisterGetSP(ArchType::ARCH_X86); 183 EXPECT_STREQ(GetArchName(ArchType::ARCH_X86).c_str(), "X86_32"); 184 RegisterGetSP(ArchType::ARCH_X86_64); 185 EXPECT_STREQ(GetArchName(ArchType::ARCH_X86_64).c_str(), "X86_64"); 186 RegisterGetSP(ArchType::ARCH_UNKNOWN); 187 EXPECT_STREQ(GetArchName(ArchType::ARCH_UNKNOWN).c_str(), "Unsupport"); 188} 189} // namespace HiPerf 190} // namespace Developtools 191} // namespace OHOS 192