Searched refs:step_b (Results 1 - 6 of 6) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| H A D | gk20a.c | 511 u32 step_a, step_b; in gk20a_clk_setup_slide() local
518 step_b = 0x0b; in gk20a_clk_setup_slide()
522 step_b = 0x08; in gk20a_clk_setup_slide()
526 step_b = 0x05; in gk20a_clk_setup_slide()
537 step_b << GPCPLL_CFG3_PLL_STEPB_SHIFT); in gk20a_clk_setup_slide()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| H A D | gk20a.c | 511 u32 step_a, step_b; in gk20a_clk_setup_slide() local
518 step_b = 0x0b; in gk20a_clk_setup_slide()
522 step_b = 0x08; in gk20a_clk_setup_slide()
526 step_b = 0x05; in gk20a_clk_setup_slide()
537 step_b << GPCPLL_CFG3_PLL_STEPB_SHIFT); in gk20a_clk_setup_slide()
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| /kernel/linux/linux-5.10/drivers/clk/tegra/ |
| H A D | clk-tegra210.c | 1058 static void pllx_get_dyn_steps(struct clk_hw *hw, u32 *step_a, u32 *step_b) in pllx_get_dyn_steps() argument
1075 *step_b = 0x0B; in pllx_get_dyn_steps()
1079 *step_b = 0x08; in pllx_get_dyn_steps()
1083 *step_b = 0x05; in pllx_get_dyn_steps()
1126 u32 step_a, step_b; in tegra210_pllx_set_defaults() local
1131 pllx_get_dyn_steps(&pllx->hw, &step_a, &step_b); in tegra210_pllx_set_defaults()
1135 val |= step_b << PLLX_MISC2_DYNRAMP_STEPB_SHIFT; in tegra210_pllx_set_defaults()
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| H A D | clk-pll.c | 1269 u32 step_a, step_b; in _setup_dynamic_ramp() local
1276 step_b = 0x0B; in _setup_dynamic_ramp()
1280 step_b = 0x09; in _setup_dynamic_ramp()
1284 step_b = 0x08; in _setup_dynamic_ramp()
1294 val |= step_b << pll_params->stepb_shift; in _setup_dynamic_ramp()
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| /kernel/linux/linux-6.6/drivers/clk/tegra/ |
| H A D | clk-tegra210.c | 1109 static void pllx_get_dyn_steps(struct clk_hw *hw, u32 *step_a, u32 *step_b) in pllx_get_dyn_steps() argument
1126 *step_b = 0x0B; in pllx_get_dyn_steps()
1130 *step_b = 0x08; in pllx_get_dyn_steps()
1134 *step_b = 0x05; in pllx_get_dyn_steps()
1177 u32 step_a, step_b; in tegra210_pllx_set_defaults() local
1182 pllx_get_dyn_steps(&pllx->hw, &step_a, &step_b); in tegra210_pllx_set_defaults()
1186 val |= step_b << PLLX_MISC2_DYNRAMP_STEPB_SHIFT; in tegra210_pllx_set_defaults()
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| H A D | clk-pll.c | 1272 u32 step_a, step_b; in _setup_dynamic_ramp() local
1279 step_b = 0x0B; in _setup_dynamic_ramp()
1283 step_b = 0x09; in _setup_dynamic_ramp()
1287 step_b = 0x08; in _setup_dynamic_ramp()
1297 val |= step_b << pll_params->stepb_shift; in _setup_dynamic_ramp()
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