| /third_party/optimized-routines/string/aarch64/ |
| H A D | strcpy-mte.S | 17 #define srcin x1 define
60 bic src, srcin, 15
65 lsl shift, srcin, 2
82 sub tmp, src, srcin
87 ldr dataq, [srcin]
88 ldr dataq2, [srcin, tmp]
104 ldr data1, [srcin]
105 ldr data2, [srcin, tmp]
115 ldr dataw1, [srcin]
116 ldr dataw2, [srcin, tm
[all...] |
| H A D | memchr-mte.S | 16 #define srcin x0 define
49 bic src, srcin, 15
56 lsl shift, srcin, 2
65 add result, srcin, synd, lsr 2
71 sub tmp, src, srcin
100 add tmp, srcin, cntin
|
| H A D | strlen.S | 16 #define srcin x0 define
78 and tmp1, srcin, MIN_PAGE_SIZE - 1
83 ldp data1, data2, [srcin]
116 ldp data1, data2, [srcin, 16]
142 bic src, srcin, 31
155 sub len, src, srcin
179 bic src, srcin, 31
191 lsl shift, srcin, 1
|
| H A D | strnlen.S | 16 #define srcin x0 define
47 bic src, srcin, 15
53 lsl shift, srcin, 2
68 sub tmp, src, srcin
97 sub result, src, srcin
|
| H A D | strlen-mte.S | 16 #define srcin x0 define
43 bic src, srcin, 15
48 lsl shift, srcin, 2
70 sub result, src, srcin
|
| H A D | strchr-mte.S | 16 #define srcin x0 define
47 bic src, srcin, 15
59 lsl tmp3, srcin, 2
71 add result, srcin, tmp1, lsr 2
|
| H A D | strchrnul-mte.S | 16 #define srcin x0 define
45 bic src, srcin, 15
52 lsl tmp2, srcin, 2
61 add result, srcin, tmp1, lsr 2
|
| H A D | strcpy.S | 23 #define srcin x1 define
95 and tmp2, srcin, #(MIN_PAGE_SIZE - 1)
97 and to_align, srcin, #15
101 srcin + 15 causes bit[MIN_PAGE_P2] to change value. A 16-byte
107 ldp data1, data2, [srcin]
197 sub src, srcin, to_align
250 bic src, srcin, #15
251 /* Start by loading two words at [srcin & ~15], then forcing the
252 bytes that precede srcin to 0xff. This means they never look
277 loaded directly from srcin
[all...] |
| H A D | memrchr.S | 16 #define srcin x0 define
50 add end, srcin, cntin
108 cmp tmp, srcin
|
| H A D | strchrnul.S | 17 #define srcin x0 define
56 bic src, srcin, #31 /* Work with aligned 32-byte hunks. */
58 ands tmp1, srcin, #31
|
| H A D | strrchr-mte.S | 16 #define srcin x0 define
48 bic src, srcin, 15
52 tst srcin, 15
63 lsl shift, srcin, 2
|
| H A D | memchr.S | 17 #define srcin x0 define
52 /* Do not dereference srcin if no bytes to compare. */
62 bic src, srcin, #31
64 ands soff, srcin, #31
|
| H A D | strchr.S | 17 #define srcin x0 define
61 bic src, srcin, #31 /* Work with aligned 32-byte hunks. */
63 ands tmp1, srcin, #31
|
| H A D | strrchr.S | 17 #define srcin x0 define
65 bic src, srcin, #31 /* Work with aligned 32-byte hunks. */
68 ands tmp1, srcin, #31
|
| /third_party/optimized-routines/string/arm/ |
| H A D | strlen-armv6t2.S | 31 #define srcin r0 define
44 pld [srcin, #0]
46 bic src, srcin, #7
48 ands tmp1, srcin, #7 /* (8 - bytes) to alignment. */
|
| /third_party/skia/src/core/ |
| H A D | SkBlendMode.cpp | 95 case SkBlendMode::kSrcIn: stage = SkRasterPipeline::srcin; break; in SkBlendMode_AppendStages()
|
| H A D | SkRasterPipeline.h | 71 M(srcatop) M(srcin) M(srcout) M(srcover) \
|
| /third_party/skia/src/opts/ |
| H A D | SkRasterPipeline_opts.h | 1410 BLEND_MODE(srcin) { return s * da; }
3409 BLEND_MODE(srcin) { return div255( s*da ); }
|