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Searched refs:drate (Results 1 - 2 of 2) sorted by relevance

/device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/
H A D	clk-ddr.c	63 static int rockchip_ddrclk_sip_set_rate(struct clk_hw hw, unsigned long drate, unsigned long prate) in rockchip_ddrclk_sip_set_rate() argument 67 arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, drate, 0, ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE, 0, 0, 0, 0, &res); in rockchip_ddrclk_sip_set_rate() 114 static int rockchip_ddrclk_scpi_set_rate(struct clk_hw hw, unsigned long drate, unsigned long prate) in rockchip_ddrclk_scpi_set_rate() argument 125 ret = scpi_ddr_set_clk_rate(drate / MHZ, lcdc_type); in rockchip_ddrclk_scpi_set_rate() 161 static int rockchip_ddrclk_sip_set_rate_v2(struct clk_hw *hw, unsigned long drate, unsigned long prate) in rockchip_ddrclk_sip_set_rate_v2() argument 168 p->hz = drate; in rockchip_ddrclk_sip_set_rate_v2()
H A D	clk-pll.c	364 static long rockchip_pll_round_rate(struct clk_hw hw, unsigned long drate, unsigned long prate) in rockchip_pll_round_rate() argument 366 return drate; in rockchip_pll_round_rate() 544 static int rockchip_rk3036_pll_set_rate(struct clk_hw hw, unsigned long drate, unsigned long prate) in rockchip_rk3036_pll_set_rate() argument 549 pr_debug("%s: changing %s to %lu with a parent rate of %lu\n", __func__, __clk_get_name(hw->clk), drate, prate); in rockchip_rk3036_pll_set_rate() 552 rate = rockchip_get_pll_settings(pll, drate); in rockchip_rk3036_pll_set_rate() 554 pr_err("%s: Invalid rate : %lu for pll clk %s\n", __func__, drate, __clk_get_name(hw->clk)); in rockchip_rk3036_pll_set_rate() 591 unsigned long drate; in rockchip_rk3036_pll_init() local 597 drate = clk_hw_get_rate(hw); in rockchip_rk3036_pll_init() 598 rate = rockchip_get_pll_settings(pll, drate); in rockchip_rk3036_pll_init() 606 pr_debug("%s: pll %s@%lu: Hz\n", __func__, __clk_get_name(hw->clk), drate); in rockchip_rk3036_pll_init() 757 rockchip_rk3066_pll_set_rate(struct clk_hw hw, unsigned long drate, unsigned long prate) rockchip_rk3066_pll_set_rate() argument 818 unsigned long drate; rockchip_rk3066_pll_init() local 1006 rockchip_rk3399_pll_set_rate(struct clk_hw *hw, unsigned long drate, unsigned long prate) rockchip_rk3399_pll_set_rate() argument 1061 unsigned long drate; rockchip_rk3399_pll_init() local [all...]

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