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Searched refs:zm_h (Results 1 - 2 of 2) sorted by relevance

/third_party/vixl/test/aarch64/
H A D	test-assembler-sve-aarch64.cc	4544 unsigned zm_h[] = {0x0000, 0x0123, 0x1010, 0x0000, 0x8181, 0x8080, 0xffff, 0xffff}; 4582 IntBinArithHelper(config, fn, kHRegSize, pg_h, zn_h, zm_h, add_exp_h); 4601 IntBinArithHelper(config, fn, kHRegSize, pg_h, zn_h, zm_h, sub_exp_h); 4616 unsigned zm_h[] = {0x0001, 0x0000, 0x00ee, 0xfffe, 4649 IntBinArithHelper(config, fn, kHRegSize, pg_h, zn_h, zm_h, umax_exp_h); 4665 IntBinArithHelper(config, fn, kHRegSize, pg_h, zn_h, zm_h, umin_exp_h); 4682 IntBinArithHelper(config, fn, kHRegSize, pg_h, zn_h, zm_h, uabd_exp_h); 4697 int zm_h[] = {-1, 0, -1, INT16_MIN + 1, 4730 IntBinArithHelper(config, fn, kHRegSize, pg_h, zn_h, zm_h, smax_exp_h); 4747 IntBinArithHelper(config, fn, kHRegSize, pg_h, zn_h, zm_h, smin_exp_ [all...]
/third_party/vixl/src/aarch64/
H A D	simulator-aarch64.cc	`3186 SimVRegister& zm_h = ReadVRegister(instr->ExtractBits(18, 16)); in Simulator() local 3196 cmla(kFormatVnH, zda, zda, zn, zm_h, idx_h, rot); in Simulator() 3205 sqrdcmlah(kFormatVnH, zda, zda, zn, zm_h, idx_h, rot); in Simulator()`

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