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Searched refs:zip2 (Results 1 - 25 of 33) sorted by relevance

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/third_party/ffmpeg/libavcodec/aarch64/
H A Daacpsdsp_neon.S38 zip2 v4.4S, v2.4S, v2.4S
51 zip2 v5.4S, v0.4S, v0.4S
53 zip2 v7.4S, v1.4S, v1.4S
75 zip2 v17.4S, v0.4S, v0.4S
77 zip2 v19.4S, v2.4S, v1.4S
79 zip2 v21.4S, v6.4S, v6.4S
81 zip2 v23.4S, v3.4S, v7.4S
H A Dsimple_idct_neon.S245 zip2 v17.4S, v1.4S, v2.4S
251 zip2 v19.4S, v3.4S, v4.4S
285 zip2 v24.2D, v1.2D, v7.2D
288 zip2 v26.2D, v2.2D, v16.2D
291 zip2 v28.2D, v3.2D, v17.2D
294 zip2 v30.2D, v4.2D, v18.2D
349 zip2 v24.2D, v1.2D, v7.2D
352 zip2 v26.2D, v2.2D, v16.2D
355 zip2 v28.2D, v3.2D, v17.2D
358 zip2 v3
[all...]
H A Dhevcdsp_sao_neon.S132 zip2 v19.16b, v16.16b, v17.16b // sao_offset_val upper ->
188 zip2 v19.16b, v16.16b, v17.16b
H A Dfft_neon.S190 zip2 v21.4s, v24.4s, v25.4s
215 zip2 v25.4s, v26.4s, v27.4s
280 zip2 v21.4s, v24.4s, v25.4s
318 zip2 v21.4s, v26.4s, v27.4s
/third_party/typescript/tests/baselines/reference/
H A DrecursiveTypeAliasWithSpreadConditionalReturnNotCircular.js6 zip2<O extends Array<Option<any>>>(...others: O): Option<[T, ...UnzipOptionArray2<O>]>;
25 const zipped2 = opt1.zip2(opt2, opt3);
32 var zipped2 = opt1.zip2(opt2, opt3);
/third_party/node/deps/openssl/openssl/crypto/chacha/asm/
H A Dchacha-armv8.pl522 zip2 $xt2,$xa0,$xa1
523 zip2 $xt3,$xa2,$xa3
525 zip2.64 $xa1,$xt0,$xt1
527 zip2.64 $xa3,$xt2,$xt3
531 zip2 $xt2,$xb0,$xb1
532 zip2 $xt3,$xb2,$xb3
534 zip2.64 $xb1,$xt0,$xt1
536 zip2.64 $xb3,$xt2,$xt3
542 zip2 $xt2,$xc0,$xc1
544 zip2
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/third_party/openssl/crypto/chacha/asm/
H A Dchacha-armv8.pl526 zip2 $xt2,$xa0,$xa1
527 zip2 $xt3,$xa2,$xa3
529 zip2.64 $xa1,$xt0,$xt1
531 zip2.64 $xa3,$xt2,$xt3
535 zip2 $xt2,$xb0,$xb1
536 zip2 $xt3,$xb2,$xb3
538 zip2.64 $xb1,$xt0,$xt1
540 zip2.64 $xb3,$xt2,$xt3
546 zip2 $xt2,$xc0,$xc1
548 zip2
[all...]
/third_party/ffmpeg/libswscale/aarch64/
H A Dyuv2rgb_neon.S158 zip2 v21.8H, v20.8H, v20.8H // R2
160 zip2 v23.8H, v22.8H, v22.8H // G2
162 zip2 v25.8H, v24.8H, v24.8H // B2
/third_party/python/Lib/test/
H A Dtest_zipimport.py312 zip2 = TEMP_DIR
313 self.makeTree(files2, zip2)
315 # zip2 should override zip1.
317 sys.path.insert(0, zip2)
353 # subpkg.TESTMOD exists in both zips should load from zip2.
358 # subpkg.TESTMOD + '2' only exists in zip2.
388 zip2 = os.path.abspath("path2.zip")
389 self.makeZip(files2, zip2)
391 # zip2 should override zip1.
393 sys.path.insert(0, zip2)
[all...]
H A Dtest_zipfile.py2403 self.zip2 = zipfile.ZipFile(TESTFN2, "r")
2408 self.zip2.close()
2415 self.assertRaises(RuntimeError, self.zip2.read, "zero")
2420 self.zip2.setpassword(b"perl")
2421 self.assertRaises(RuntimeError, self.zip2.read, "zero")
2427 self.zip2.setpassword(b"12345")
2428 self.assertEqual(self.zip2.read("zero"), self.plain2)
/third_party/node/deps/openssl/config/archs/linux-aarch64/asm/crypto/chacha/
H A Dchacha-armv8.S602 zip2 v6.4s,v16.4s,v20.4s
603 zip2 v7.4s,v24.4s,v28.4s
605 zip2 v20.2d,v4.2d,v5.2d
607 zip2 v28.2d,v6.2d,v7.2d
611 zip2 v6.4s,v17.4s,v21.4s
612 zip2 v7.4s,v25.4s,v29.4s
614 zip2 v21.2d,v4.2d,v5.2d
616 zip2 v29.2d,v6.2d,v7.2d
622 zip2 v6.4s,v18.4s,v22.4s
624 zip2 v
[all...]
/third_party/node/deps/openssl/config/archs/darwin64-arm64-cc/asm/crypto/chacha/
H A Dchacha-armv8.S602 zip2 v6.4s,v16.4s,v20.4s
603 zip2 v7.4s,v24.4s,v28.4s
605 zip2 v20.2d,v4.2d,v5.2d
607 zip2 v28.2d,v6.2d,v7.2d
611 zip2 v6.4s,v17.4s,v21.4s
612 zip2 v7.4s,v25.4s,v29.4s
614 zip2 v21.2d,v4.2d,v5.2d
616 zip2 v29.2d,v6.2d,v7.2d
622 zip2 v6.4s,v18.4s,v22.4s
624 zip2 v
[all...]
/third_party/node/deps/openssl/config/archs/darwin64-arm64-cc/asm_avx2/crypto/chacha/
H A Dchacha-armv8.S602 zip2 v6.4s,v16.4s,v20.4s
603 zip2 v7.4s,v24.4s,v28.4s
605 zip2 v20.2d,v4.2d,v5.2d
607 zip2 v28.2d,v6.2d,v7.2d
611 zip2 v6.4s,v17.4s,v21.4s
612 zip2 v7.4s,v25.4s,v29.4s
614 zip2 v21.2d,v4.2d,v5.2d
616 zip2 v29.2d,v6.2d,v7.2d
622 zip2 v6.4s,v18.4s,v22.4s
624 zip2 v
[all...]
/third_party/node/deps/openssl/config/archs/linux-aarch64/asm_avx2/crypto/chacha/
H A Dchacha-armv8.S602 zip2 v6.4s,v16.4s,v20.4s
603 zip2 v7.4s,v24.4s,v28.4s
605 zip2 v20.2d,v4.2d,v5.2d
607 zip2 v28.2d,v6.2d,v7.2d
611 zip2 v6.4s,v17.4s,v21.4s
612 zip2 v7.4s,v25.4s,v29.4s
614 zip2 v21.2d,v4.2d,v5.2d
616 zip2 v29.2d,v6.2d,v7.2d
622 zip2 v6.4s,v18.4s,v22.4s
624 zip2 v
[all...]
/third_party/ffmpeg/libavresample/aarch64/
H A Daudio_convert_neon.S169 zip2 v17.4s, v5.4s, v7.4s
177 zip2 v19.4s, v1.4s, v3.4s
/third_party/ffmpeg/libswresample/aarch64/
H A Daudio_convert_neon.S171 zip2 v17.4s, v5.4s, v7.4s
179 zip2 v19.4s, v1.4s, v3.4s
/third_party/vixl/test/aarch64/
H A Dtest-trace-aarch64.cc2514 __ zip2(v23.V16B(), v10.V16B(), v11.V16B()); in GenerateTestSequenceNEON()
2515 __ zip2(v30.V2D(), v6.V2D(), v14.V2D()); in GenerateTestSequenceNEON()
2516 __ zip2(v9.V2S(), v10.V2S(), v21.V2S()); in GenerateTestSequenceNEON()
2517 __ zip2(v8.V4H(), v24.V4H(), v29.V4H()); in GenerateTestSequenceNEON()
2518 __ zip2(v0.V4S(), v21.V4S(), v23.V4S()); in GenerateTestSequenceNEON()
2519 __ zip2(v25.V8B(), v23.V8B(), v30.V8B()); in GenerateTestSequenceNEON()
2520 __ zip2(v7.V8H(), v10.V8H(), v30.V8H()); in GenerateTestSequenceNEON()
H A Dtest-cpu-features-aarch64.cc2777 TEST_NEON(zip2_0, zip2(v0.V8B(), v1.V8B(), v2.V8B()))
2778 TEST_NEON(zip2_1, zip2(v0.V16B(), v1.V16B(), v2.V16B()))
2779 TEST_NEON(zip2_2, zip2(v0.V4H(), v1.V4H(), v2.V4H()))
2780 TEST_NEON(zip2_3, zip2(v0.V8H(), v1.V8H(), v2.V8H()))
2781 TEST_NEON(zip2_4, zip2(v0.V2S(), v1.V2S(), v2.V2S()))
2782 TEST_NEON(zip2_5, zip2(v0.V4S(), v1.V4S(), v2.V4S()))
2783 TEST_NEON(zip2_6, zip2(v0.V2D(), v1.V2D(), v2.V2D()))
H A Dtest-disasm-sve-aarch64.cc5480 COMPARE(zip2(p1.VnB(), p15.VnB(), p2.VnB()), "zip2 p1.b, p15.b, p2.b"); in TEST()
5481 COMPARE(zip2(p1.VnH(), p15.VnH(), p2.VnH()), "zip2 p1.h, p15.h, p2.h"); in TEST()
5482 COMPARE(zip2(p1.VnS(), p15.VnS(), p2.VnS()), "zip2 p1.s, p15.s, p2.s"); in TEST()
5483 COMPARE(zip2(p1.VnD(), p15.VnD(), p2.VnD()), "zip2 p1.d, p15.d, p2.d"); in TEST()
5528 COMPARE(zip2(z15.VnB(), z23.VnB(), z12.VnB()), "zip2 z1 in TEST()
[all...]
/third_party/vixl/src/aarch64/
H A Dassembler-aarch64.h3216 void zip2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
5899 void zip2(const PRegisterWithLaneSize& pd,
5904 void zip2(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm);
H A Dmacro-assembler-aarch64.h2984 V(zip2, Zip2) \
6552 zip2(pd, pn, pm); in Zip2()
6557 zip2(zd, zn, zm); in Zip2()
H A Dsimulator-aarch64.cc9628 zip2(vf, rd, rn, rm); in Simulator()
13215 zip2(kFormatVnB, temp, temp, zero); in Simulator()
13253 zip2(vform, temp0, temp0, temp1); in Simulator()
13321 zip2(vform, zd, zn, zm); in Simulator()
/third_party/node/deps/v8/src/codegen/arm64/
H A Dassembler-arm64.h1345 void zip2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
H A Dmacro-assembler-arm64.h482 V(zip2, Zip2)
/third_party/node/deps/v8/src/execution/arm64/
H A Dsimulator-arm64.h1883 LogicVRegister zip2(VectorFormat vform, LogicVRegister dst,

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