| /third_party/node/deps/v8/src/diagnostics/arm/ |
| H A D | disasm-arm.cc | 1493 // vrintz - round towards zero (truncate) in DecodeTypeVFP()
1495 Format(instr, "vrintz'cond.f64.f64 'Dd, 'Dm"); in DecodeTypeVFP()
1497 Format(instr, "vrintz'cond.f32.f32 'Sd, 'Sm"); in DecodeTypeVFP()
2316 Format(instr, q ? "vrintz.f32 'Qd, 'Qm" : "vrintz.f32 'Dd, 'Dm"); in DecodeAdvancedSIMDTwoOrThreeRegisters()
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| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | assembler-arm.h | 838 void vrintz(const SwVfpRegister dst, const SwVfpRegister src,
840 void vrintz(const DwVfpRegister dst, const DwVfpRegister src,
938 void vrintz(NeonDataType dt, const QwNeonRegister dst,
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| H A D | assembler-arm.cc | 3731 void Assembler::vrintz(const SwVfpRegister dst, const SwVfpRegister src, in vrintz() function in v8::internal::Assembler
3744 void Assembler::vrintz(const DwVfpRegister dst, const DwVfpRegister src, in vrintz() function in v8::internal::Assembler
4861 void Assembler::vrintz(NeonDataType dt, const QwNeonRegister dst, in vrintz() function in v8::internal::Assembler
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| /third_party/node/deps/v8/src/compiler/backend/arm/ |
| H A D | code-generator-arm.cc | 1439 __ vrintz(NeonS32, i.OutputSimd128Register(), in AssembleArchInstruction()
1442 __ vrintz(i.OutputFloatRegister(), i.InputFloatRegister(0)); in AssembleArchInstruction()
1448 __ vrintz(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); in AssembleArchInstruction()
2017 __ vrintz(dst.low(), src.low()); in AssembleArchInstruction()
2018 __ vrintz(dst.high(), src.high()); in AssembleArchInstruction()
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| /third_party/vixl/src/aarch32/ |
| H A D | assembler-aarch32.h | 5605 void vrintz(Condition cond, DataType dt, DRegister rd, DRegister rm);
5606 void vrintz(DataType dt, DRegister rd, DRegister rm) { in vrintz() function in vixl::aarch32::Assembler
5607 vrintz(al, dt, rd, rm); in vrintz()
5610 void vrintz(DataType dt, QRegister rd, QRegister rm);
5612 void vrintz(Condition cond, DataType dt, SRegister rd, SRegister rm);
5613 void vrintz(DataType dt, SRegister rd, SRegister rm) { in vrintz() function in vixl::aarch32::Assembler
5614 vrintz(al, dt, rd, rm); in vrintz()
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| H A D | disasm-aarch32.h | 2371 void vrintz(Condition cond, DataType dt, DRegister rd, DRegister rm);
2373 void vrintz(DataType dt, QRegister rd, QRegister rm);
2375 void vrintz(Condition cond, DataType dt, SRegister rd, SRegister rm);
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| H A D | disasm-aarch32.cc | 6268 void Disassembler::vrintz(Condition cond, in vrintz() function in vixl::aarch32::Disassembler
6277 void Disassembler::vrintz(DataType dt, QRegister rd, QRegister rm) { in vrintz() function in vixl::aarch32::Disassembler
6282 void Disassembler::vrintz(Condition cond, in vrintz() function in vixl::aarch32::Disassembler
[all...] |
| H A D | assembler-aarch32.cc | 24666 void Assembler::vrintz(Condition cond, in vrintz() function in vixl::aarch32::Assembler
24701 Delegate(kVrintz, &Assembler::vrintz, cond, dt, rd, rm); in vrintz()
24704 void Assembler::vrintz(DataType dt, QRegister rd, QRegister rm) { in vrintz() function in vixl::aarch32::Assembler
24724 Delegate(kVrintz, &Assembler::vrintz, dt, rd, rm); in vrintz()
24727 void Assembler::vrintz(Condition cond, in vrintz() function in vixl::aarch32::Assembler
24748 Delegate(kVrintz, &Assembler::vrintz, cond, dt, rd, rm); in vrintz()
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| H A D | macro-assembler-aarch32.h | 11433 vrintz(cond, dt, rd, rm); in MacroAssembler()
11445 vrintz(dt, rd, rm); in MacroAssembler()
11459 vrintz(cond, dt, rd, rm); in MacroAssembler()
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| /third_party/node/deps/v8/src/wasm/baseline/arm/ |
| H A D | liftoff-assembler-arm.h | 1895 vrintz(liftoff::GetFloatRegister(dst), liftoff::GetFloatRegister(src)); in emit_f32_trunc()
1946 vrintz(dst, src); in emit_f64_trunc()
2532 vrintz(dst.low_fp(), src.low_fp()); in emit_f64x2_trunc()
2533 vrintz(dst.high_fp(), src.high_fp()); in emit_f64x2_trunc()
2725 vrintz(NeonS32, liftoff::GetSimd128Register(dst), in emit_f32x4_trunc()
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