/third_party/mesa3d/src/amd/compiler/ |
H A D | aco_ir.cpp | 215 VOP3_instruction& vop3 = instr->vop3(); in can_use_SDWA() local 218 if (vop3.clamp && instr->isVOPC() && gfx_level != GFX8) in can_use_SDWA() 220 if (vop3.omod && gfx_level < GFX9) in can_use_SDWA() 285 VOP3_instruction& vop3 = tmp->vop3(); in convert_to_SDWA() local 286 memcpy(sdwa.neg, vop3.neg, sizeof(sdwa.neg)); in convert_to_SDWA() 287 memcpy(sdwa.abs, vop3.abs, sizeof(sdwa.abs)); in convert_to_SDWA() 288 sdwa.omod = vop3.omod; in convert_to_SDWA() 289 sdwa.clamp = vop3 in convert_to_SDWA() 336 const VOP3_instruction* vop3 = &instr->vop3(); can_use_DPP() local 385 const VOP3_instruction* vop3 = &tmp->vop3(); convert_to_DPP() local [all...] |
H A D | aco_print_ir.cpp | 563 const VOP3_instruction& vop3 = instr->vop3(); in print_instr_format_specific() local 564 switch (vop3.omod) { in print_instr_format_specific() 569 if (vop3.clamp) in print_instr_format_specific() 571 if (vop3.opsel & (1 << 3)) in print_instr_format_specific() 680 const VOP3_instruction& vop3 = instr->vop3(); in aco_print_instr() local 682 abs[i] = vop3.abs[i]; in aco_print_instr() 683 neg[i] = vop3.neg[i]; in aco_print_instr() 684 opsel[i] = vop3 in aco_print_instr() 730 const VOP3P_instruction& vop3 = instr->vop3p(); aco_print_instr() local [all...] |
H A D | aco_optimizer.cpp | 1084 !(instr->vop3().opsel & (1 << idx))) { in can_apply_extract() 1139 instr->vop3().opsel |= 1 << idx; in apply_extract() 1363 else if (instr->isVOP3() && !instr->vop3().abs[i]) in label_instruction() 1364 instr->vop3().neg[i] = true; in label_instruction() 1376 instr->vop3().abs[i] = true; in label_instruction() 1779 VOP3_instruction* vop3 = instr->isVOP3() ? &instr->vop3() : NULL; in label_instruction() 1780 if (vop3 && (vop3->abs[!i] || vop3 in label_instruction() 2130 VOP3_instruction& vop3 = op_instr[i]->vop3(); combine_ordering_test() local 2169 VOP3_instruction* vop3 = combine_ordering_test() local 2334 VOP3_instruction& vop3 = nan_test->vop3(); combine_constant_comparison_ordering() local 4012 VOP3_instruction& vop3 = mul_instr->vop3(); combine_instruction() local 4028 VOP3_instruction& vop3 = instr->vop3(); combine_instruction() local [all...] |
H A D | aco_assembler.cpp | 592 VOP3_instruction& vop3 = instr->vop3(); in emit_instruction() local 618 encoding |= (vop3.clamp ? 1 : 0) << 11; in emit_instruction() 621 encoding |= (vop3.clamp ? 1 : 0) << 15; in emit_instruction() 623 encoding |= vop3.opsel << 11; in emit_instruction() 625 encoding |= vop3.abs[i] << (8 + i); in emit_instruction() 641 encoding |= vop3.omod << 27; in emit_instruction() 643 encoding |= vop3.neg[i] << (29 + i); in emit_instruction() 647 VOP3P_instruction& vop3 = instr->vop3p(); in emit_instruction() local 659 encoding |= (vop3 in emit_instruction() [all...] |
H A D | aco_lower_to_hw_instr.cpp | 217 bld.vop3(aco_opcode::v_add_co_u32_e64, dst[0], bld.def(bld.lm, vcc), vtmp_op[0], src1[0]); in emit_int64_dpp_op() 277 bld.vop3(aco_opcode::v_mul_lo_u32, vtmp_def[1], vtmp_op[0], src1[0]); in emit_int64_dpp_op() 282 bld.vop3(aco_opcode::v_mul_lo_u32, vtmp_def[0], vtmp_op[0], src1[1]); in emit_int64_dpp_op() 288 bld.vop3(aco_opcode::v_mul_hi_u32, vtmp_def[0], vtmp_op[0], src1[0]); in emit_int64_dpp_op() 294 bld.vop3(aco_opcode::v_mul_lo_u32, dst[0], vtmp_op[0], src1[0]); in emit_int64_dpp_op() 327 bld.vop3(aco_opcode::v_add_co_u32_e64, dst[0], bld.def(bld.lm, vcc), src0[0], src1[0]); in emit_int64_op() 376 bld.vop3(aco_opcode::v_mul_lo_u32, tmp0_def, src0[1], src1[0]); in emit_int64_op() 377 bld.vop3(aco_opcode::v_mul_lo_u32, tmp1_def, src0[0], src1[1]); in emit_int64_op() 379 bld.vop3(aco_opcode::v_mul_hi_u32, tmp1_def, src0[0], src1[0]); in emit_int64_op() 381 bld.vop3(aco_opcod in emit_int64_op() 397 bool vop3 = is_vop3_reduce_opcode(opcode); emit_dpp_op() local 437 bool vop3 = is_vop3_reduce_opcode(opcode); emit_op() local [all...] |
H A D | aco_instruction_selection.cpp | 144 return bld.vop3(aco_opcode::v_mbcnt_lo_u32_b32, Definition(dst), mask_lo, base); in emit_mbcnt() 161 Temp mbcnt_lo = bld.vop3(aco_opcode::v_mbcnt_lo_u32_b32, bld.def(v1), mask_lo, base); in emit_mbcnt() 166 return bld.vop3(aco_opcode::v_mbcnt_hi_u32_b32_e64, Definition(dst), mask_hi, mbcnt_lo); in emit_mbcnt() 329 bld.vop3(aco_opcode::v_mul_hi_u32, Definition(multiply_dst), increment_dst, in emit_v_div_u32() 544 tmp[i] = bld.vop3(aco_opcode::v_alignbyte_b32, bld.def(v1), tmp[i + 1], tmp[i], offset); in byte_align_vector() 957 tmp = bld.vop3(op, bld.def(dst.regClass()), src[0], src[1], src[2]); 959 tmp = bld.vop3(op, bld.def(dst.regClass()), src[0], src[1]); 963 bld.vop3(aco_opcode::v_mul_f64, Definition(dst), Operand::c64(0x3FF0000000000000), tmp); 965 bld.vop3(op, Definition(dst), src[0], src[1], src[2]); 967 bld.vop3(o [all...] |
H A D | aco_ir.h | 811 /* Value if this were used with vop3/opsel or vop3p. */ 1281 VOP3_instruction& vop3() noexcept 1286 const VOP3_instruction& vop3() const noexcept 1773 const VOP3_instruction& vop3 = this->vop3(); 1775 if (vop3.abs[i] || vop3.neg[i]) 1778 return vop3.opsel || vop3.clamp || vop3 [all...] |
H A D | aco_opt_value_numbering.cpp | 170 VOP3_instruction& a3 = a->vop3(); in operator ()() 171 VOP3_instruction& b3 = b->vop3(); in operator ()()
|
H A D | aco_validate.cpp | 227 VOP3_instruction& vop3 = instr->vop3(); in validate_ir() local 228 check(vop3.opsel == 0 || program->gfx_level >= GFX9, "Opsel is only supported on GFX9+", in validate_ir() 235 check((vop3.opsel & (1 << i)) == 0, "Unexpected opsel for operand", instr.get()); in validate_ir() 238 check((vop3.opsel & (1 << 3)) == 0, "Unexpected opsel for sub-dword definition", in validate_ir()
|
H A D | aco_register_allocation.cpp | 546 instr->vop3().opsel |= 1 << idx; in add_subdword_operand() 691 instr->vop3().opsel |= (1 << 3); /* dst in high half */ in add_subdword_definition()
|
/third_party/mesa3d/src/amd/compiler/tests/ |
H A D | test_sdwa.cpp | 263 writeout(13, bld.vop3(aco_opcode::v_add_i16, bld.def(v1), inputs[0], bfe_word0_b)); 269 writeout(14, bld.vop3(aco_opcode::v_add_i16, bld.def(v1), inputs[0], bfe_word1_b)); 388 VOP3_instruction *mul = &bld.vop2_e64(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], byte0_b).instr->vop3(); 399 mul = &bld.vop2_e64(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], byte0_b).instr->vop3(); 502 val = bld.vop3(aco_opcode::v_sub_i16, bld.def(v1), inputs[0], inputs[1]); 508 val = bld.vop3(aco_opcode::v_sub_i16, bld.def(v1), inputs[0], inputs[1]); 514 val = bld.vop3(aco_opcode::v_sub_i16, bld.def(v1), inputs[0], inputs[1]); 540 val = bld.vop3(aco_opcode::v_med3_f32, bld.def(v1), val, Operand::zero(), 557 val = bld.vop3(aco_opcode::v_med3_f32, bld.def(v1), val, Operand::zero(), 567 val = bld.vop3(aco_opcod [all...] |
H A D | test_optimizer.cpp | 115 writeout(3, bld.vop3(aco_opcode::v_med3_f32, bld.def(v1), Operand::zero(), 122 writeout(4, bld.vop3(aco_opcode::v_med3_f32, bld.def(v1), Operand::zero(), 145 writeout(8, bld.vop3(aco_opcode::v_med3_f16, bld.def(v2b), Operand::c16(0u), 152 writeout(9, bld.vop3(aco_opcode::v_med3_f16, bld.def(v2b), Operand::c16(0u), 161 tmp = bld.vop3(aco_opcode::v_med3_f32, bld.def(v1), Operand::zero(), Operand::c32(0x3f800000u), 206 writeout(15, bld.vop3(aco_opcode::v_med3_f32, bld.def(v1), Operand::zero(), 224 writeout(17, bld.vop3(aco_opcode::v_med3_f16, bld.def(v2b), Operand::c16(0u), 245 writeout(19, bld.vop3(aco_opcode::v_med3_f32, bld.def(v1), Operand::zero(), 261 writeout(21, bld.vop3(aco_opcode::v_med3_f16, bld.def(v2b), Operand::c16(0u), 408 bcnt = bld.vop3(aco_opcod [all...] |
H A D | test_optimizer_postRA.cpp | 330 res4.instr->vop3().neg[0] = true; 338 res5.instr->vop3().clamp = true; 346 res6.instr->vop3().abs[0] = true; 353 res7.instr->vop3().abs[0] = true;
|
H A D | helpers.cpp | 283 res.instr->vop3().abs[1] = true; in fabs() 287 res.instr->vop3().abs[1] = true; in fabs() 326 return b.vop3(aco_opcode::v_fma_f16, b.def(v2b), src0, src1, src2); in fma() 328 return b.vop3(aco_opcode::v_fma_f32, b.def(v1), src0, src1, src2); in fma() 334 return b.vop3(aco_opcode::v_med3_f16, b.def(v2b), Operand::c16(0u), in fsat() 337 return b.vop3(aco_opcode::v_med3_f32, b.def(v1), Operand::zero(), in fsat()
|