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Searched
refs:vReg
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/third_party/node/deps/v8/src/execution/riscv64/
H
A
D
simulator-riscv64.h
713
T& Rvvelt(reg_t
vReg
, uint64_t n, bool is_write = false) {
in Rvvelt()
argument
717
vReg
+= n / elts_per_reg;
in Rvvelt()
720
vReg
* (rvv_vlen() >> 3));
in Rvvelt()
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