| /third_party/musl/src/thread/aarch64/ |
| H A D | clone.s | 16 uxtw x0,w2
|
| /third_party/ffmpeg/libavcodec/aarch64/ |
| H A D | vp8dsp_neon.S | 951 add x6, x7, w6, uxtw #4
978 add x5, x7, w5, uxtw #4
1042 add x6, x7, w6, uxtw #4
1066 add x5, x7, w5, uxtw #4
1220 add x6, x7, w6, uxtw #4
1256 add x5, x7, w5, uxtw #4
1273 add x5, x7, w5, uxtw #4
1286 add x6, x7, w6, uxtw #4
1321 add x5, x7, w5, uxtw #4
1334 add x6, x7, w6, uxtw #
[all...] |
| H A D | hevcdsp_sao_neon.S | 96 ldr w4, [x7, w4, uxtw #2] // stride_src
153 ldr w4, [x7, w4, uxtw #2]
|
| H A D | h264idct_neon.S | 118 ldrb w3, [x4, w3, uxtw]
145 ldrb w3, [x4, w3, uxtw]
175 ldrb w3, [x4, w3, uxtw] // nnzc[ scan8[i] ]
|
| H A D | vp9mc_neon.S | 358 add x9, x6, w5, uxtw #4
629 uxtw x4, w4
632 add x6, x5, w6, uxtw #4
|
| H A D | vp9mc_16bpp_neon.S | 292 add x9, x6, w5, uxtw #4
575 uxtw x4, w4
578 add x6, x5, w6, uxtw #4
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAddressingModes.h | 34 uxtw enumerator
52 case ARM_AM::uxtw: return "uxtw"; in getShiftOpcStr()
|
| H A D | ARMInstPrinter.cpp | 620 printRegImmShift(O, ARM_AM::uxtw, shift, UseMarkup);
|
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | macro-assembler-arm64-inl.h | 1033 uxtw(rd, rn); in Uxtw()
|
| H A D | assembler-arm64.h | 681 void uxtw(const Register& rd, const Register& rn) { ubfm(rd, rn, 0, 31); }
|
| /third_party/vixl/test/aarch64/ |
| H A D | test-api-movprfx-aarch64.cc | 325 __ uxtw(z14.VnD(), p3.Merging(), z14.VnD()); in TEST()
867 __ uxtw(z29.VnD(), p2.Merging(), z7.VnD()); in TEST()
1690 __ uxtw(z18.VnD(), p7.Merging(), z25.VnD()); in TEST()
|
| H A D | test-trace-aarch64.cc | 370 __ uxtw(w8, w9); in GenerateTestSequenceBase()
371 __ uxtw(x10, x11); in GenerateTestSequenceBase()
|
| H A D | test-disasm-aarch64.cc | 335 COMPARE(adds(x9, x10, Operand(x11, UXTW, 3)), "adds x9, x10, w11, uxtw #3"); in TEST()
361 COMPARE(subs(x9, x10, Operand(x11, UXTW, 3)), "subs x9, x10, w11, uxtw #3"); in TEST()
541 COMPARE(uxtw(x18, x19), "ubfx x18, x19, #0, #32"); in TEST()
1102 COMPARE(ldr(w0, MemOperand(x1, w2, UXTW)), "ldr w0, [x1, w2, uxtw]"); in TEST()
1103 COMPARE(ldr(w3, MemOperand(x4, w5, UXTW, 2)), "ldr w3, [x4, w5, uxtw #2]"); in TEST()
1112 COMPARE(ldr(x0, MemOperand(x1, w2, UXTW)), "ldr x0, [x1, w2, uxtw]"); in TEST()
1113 COMPARE(ldr(x3, MemOperand(x4, w5, UXTW, 3)), "ldr x3, [x4, w5, uxtw #3]"); in TEST()
1123 COMPARE(str(w0, MemOperand(x1, w2, UXTW)), "str w0, [x1, w2, uxtw]"); in TEST()
1124 COMPARE(str(w3, MemOperand(x4, w5, UXTW, 2)), "str w3, [x4, w5, uxtw #2]"); in TEST()
1133 COMPARE(str(x0, MemOperand(x1, w2, UXTW)), "str x0, [x1, w2, uxtw]"); in TEST()
[all...] |
| H A D | test-disasm-sve-aarch64.cc | 138 "adr z30.d, [z14.d, z16.d, uxtw]"); in TEST()
140 "adr z30.d, [z14.d, z16.d, uxtw #1]"); in TEST()
142 "adr z30.d, [z14.d, z16.d, uxtw #2]"); in TEST()
144 "adr z30.d, [z14.d, z16.d, uxtw #3]"); in TEST()
2997 COMPARE(uxtw(z14.VnD(), p1.Merging(), z13.VnD()), "uxtw z14.d, p1/m, z13.d"); in TEST()
3010 COMPARE(dci(0x0415a000), "unallocated (Unallocated)"); // uxtw b in TEST()
3011 COMPARE(dci(0x0455a000), "unallocated (Unallocated)"); // uxtw h in TEST()
3012 COMPARE(dci(0x0495a000), "unallocated (Unallocated)"); // uxtw s in TEST()
3373 "ld1b {z17.s}, p2/z, [x16, z11.s, uxtw]"); in TEST()
[all...] |
| /third_party/vixl/src/aarch64/ |
| H A D | assembler-aarch64.h | 896 void uxtw(const Register& rd, const Register& rn) { ubfm(rd, rn, 0, 31); }
5849 void uxtw(const ZRegister& zd, const PRegisterM& pg, const ZRegister& zn);
|
| H A D | macro-assembler-aarch64.h | 2807 uxtw(rd, rn); in Uxtw()
6471 uxtw(zd, pg, zn); in Uxtw()
|
| H A D | assembler-sve-aarch64.cc | 3542 void Assembler::uxtw(const ZRegister& zd, in uxtw() function in vixl::aarch64::Assembler
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 1776 (Memory.ShiftType != ARM_AM::uxtw || Memory.ShiftImm != shift)) in isMemRegRQOffset()
5856 else if (ShiftName == "uxtw" || ShiftName == "UXTW") in parseMemRegOffsetShift()
5857 St = ARM_AM::uxtw; in parseMemRegOffsetShift()
|