| /third_party/ffmpeg/libavcodec/arm/ |
| H A D | mdct_neon.S | 52 uxth r8, r6, ror #16
53 uxth r6, r6
221 uxth r12, r6, ror #16
222 uxth r6, r6
227 uxth r6, r10, ror #16
228 uxth r10, r10
236 uxth r12, r6, ror #16
237 uxth r6, r6
242 uxth r6, r10, ror #16
243 uxth r1
[all...] |
| H A D | fft_neon.S | 332 uxth lr, r4
333 uxth r4, r4, ror #16
|
| /third_party/optimized-routines/string/arm/ |
| H A D | strcmp-armv6m.S | 62 uxth r0, r2
63 uxth r1, r3
|
| /third_party/node/deps/v8/src/diagnostics/arm/ |
| H A D | disasm-arm.cc | 1250 Format(instr, "uxth'cond 'rd, 'rm"); in DecodeType3()
1253 Format(instr, "uxth'cond 'rd, 'rm, ror #8"); in DecodeType3()
1256 Format(instr, "uxth'cond 'rd, 'rm, ror #16"); in DecodeType3()
1259 Format(instr, "uxth'cond 'rd, 'rm, ror #24"); in DecodeType3()
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| /third_party/vixl/test/aarch32/ |
| H A D | test-assembler-cond-rd-operand-rn-t32.cc | 65 M(uxth)
349 #include "aarch32/traces/assembler-cond-rd-operand-rn-uxth-t32.h"
|
| H A D | test-assembler-cond-rd-operand-rn-a32.cc | 65 M(uxth)
1124 #include "aarch32/traces/assembler-cond-rd-operand-rn-uxth-a32.h"
|
| H A D | test-assembler-cond-rd-operand-rn-ror-amount-a32.cc | 57 M(uxth)
1322 #include "aarch32/traces/assembler-cond-rd-operand-rn-ror-amount-uxth-a32.h"
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| H A D | test-assembler-cond-rd-operand-rn-ror-amount-t32.cc | 57 M(uxth)
1210 #include "aarch32/traces/assembler-cond-rd-operand-rn-ror-amount-uxth-t32.h"
|
| /third_party/ffmpeg/libavcodec/aarch64/ |
| H A D | fft_neon.S | 405 uxth w5, w4
|
| /third_party/vixl/src/aarch32/ |
| H A D | assembler-aarch32.h | 3783 void uxth(Condition cond,
3787 void uxth(Register rd, const Operand& operand) { in uxth() function in vixl::aarch32::Assembler
3788 uxth(al, Best, rd, operand); in uxth()
3790 void uxth(Condition cond, Register rd, const Operand& operand) { in uxth() function in vixl::aarch32::Assembler
3791 uxth(cond, Best, rd, operand); in uxth()
3793 void uxth(EncodingSize size, Register rd, const Operand& operand) { in uxth() function in vixl::aarch32::Assembler
3794 uxth(al, size, rd, operand); in uxth()
|
| H A D | disasm-aarch32.h | 1459 void uxth(Condition cond,
|
| H A D | disasm-aarch32.cc | 3711 void Disassembler::uxth(Condition cond, in uxth() function in vixl::aarch32::Disassembler
8079 uxth(CurrentCond(), in DecodeT32()
20997 uxth(CurrentCond(), in DecodeT32()
21006 uxth(CurrentCond(), in DecodeT32()
[all...] |
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | macro-assembler-arm64-inl.h | 1027 uxth(rd, rn); in Uxth()
|
| H A D | assembler-arm64.h | 678 void uxth(const Register& rd, const Register& rn) { ubfm(rd, rn, 0, 15); }
|
| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | assembler-arm.h | 586 void uxth(Register dst, Register src, int rotate = 0, Condition cond = al);
|
| H A D | assembler-arm.cc | 2015 void Assembler::uxth(Register dst, Register src, int rotate, Condition cond) { in uxth() function in v8::internal::Assembler
|
| /third_party/vixl/test/aarch64/ |
| H A D | test-api-movprfx-aarch64.cc | 322 __ uxth(z14.VnS(), p3.Merging(), z14.VnS()); in TEST()
864 __ uxth(z27.VnD(), p5.Merging(), z1.VnD()); in TEST()
1687 __ uxth(z18.VnD(), p4.Merging(), z25.VnD()); in TEST()
|
| H A D | test-disasm-aarch64.cc | 334 COMPARE(add(w6, w7, Operand(w8, UXTH, 2)), "add w6, w7, w8, uxth #2"); in TEST()
346 COMPARE(add(x2, sp, Operand(x3, UXTH, 1)), "add x2, sp, w3, uxth #1"); in TEST()
360 COMPARE(sub(w6, w7, Operand(w8, UXTH, 2)), "sub w6, w7, w8, uxth #2"); in TEST()
369 COMPARE(cmp(x2, Operand(x3, UXTH, 3)), "cmp x2, w3, uxth #3"); in TEST()
372 COMPARE(sub(x2, sp, Operand(x3, UXTH, 1)), "sub x2, sp, w3, uxth #1"); in TEST()
539 COMPARE(uxth(w14, w15), "uxth w14, w15"); in TEST()
540 COMPARE(uxth(x16, x17), "uxth x16, w17"); in TEST()
|
| H A D | test-trace-aarch64.cc | 368 __ uxth(w4, w5); in GenerateTestSequenceBase()
369 __ uxth(x6, x7); in GenerateTestSequenceBase()
|
| H A D | test-disasm-sve-aarch64.cc | 2995 COMPARE(uxth(z27.VnS(), p0.Merging(), z29.VnS()), "uxth z27.s, p0/m, z29.s"); in TEST()
2996 COMPARE(uxth(z22.VnD(), p4.Merging(), z20.VnD()), "uxth z22.d, p4/m, z20.d"); in TEST()
3008 COMPARE(dci(0x0413a000), "unallocated (Unallocated)"); // uxth b in TEST()
3009 COMPARE(dci(0x0453a000), "unallocated (Unallocated)"); // uxth h in TEST()
|
| /third_party/vixl/src/aarch64/ |
| H A D | assembler-aarch64.h | 893 void uxth(const Register& rd, const Register& rn) { ubfm(rd, rn, 0, 15); }
5846 void uxth(const ZRegister& zd, const PRegisterM& pg, const ZRegister& zn);
|
| H A D | macro-assembler-aarch64.h | 2800 uxth(rd, rn); in Uxth()
6466 uxth(zd, pg, zn); in Uxth()
|
| H A D | assembler-sve-aarch64.cc | 3528 void Assembler::uxth(const ZRegister& zd, in uxth() function in vixl::aarch64::Assembler
|
| /third_party/node/deps/v8/src/compiler/backend/arm/ |
| H A D | code-generator-arm.cc | 1178 __ uxth(i.OutputRegister(), i.InputRegister(0), i.InputInt32(1)); in AssembleArchInstruction()
3387 __ uxth(i.TempRegister(2), i.InputRegister(2)); in AssembleArchInstruction()
3394 __ uxth(i.TempRegister(2), i.InputRegister(2)); in AssembleArchInstruction()
|
| /third_party/node/deps/v8/src/wasm/baseline/arm/ |
| H A D | liftoff-assembler-arm.h | 1312 uxth(expected.gp(), expected.gp()); in AtomicCompareExchange()
|