Home
last modified time | relevance | path

Searched refs:uqsub (Results 1 - 15 of 15) sorted by relevance

/third_party/ffmpeg/libavcodec/aarch64/
H A Dvc1dsp_neon.S760 uqsub v5.4h, v17.4h, v19.4h // a0 >= a3 ? a0-a3 : 0 (a0 > a3 in all cases where filtering is enabled, so makes more sense to subtract this way round than the opposite and then taking the abs)
831 uqsub v5.4h, v17.4h, v19.4h // a0 >= a3 ? a0-a3 : 0 (a0 > a3 in all cases where filtering is enabled, so makes more sense to subtract this way round than the opposite and then taking the abs)
905 uqsub v6.8h, v20.8h, v18.8h // a0 >= a3 ? a0-a3 : 0 (a0 > a3 in all cases where filtering is enabled, so makes more sense to subtract this way round than the opposite and then taking the abs)
1007 uqsub v5.8h, v19.8h, v18.8h // a0 >= a3 ? a0-a3 : 0 (a0 > a3 in all cases where filtering is enabled, so makes more sense to subtract this way round than the opposite and then taking the abs)
1119 uqsub v3.8h, v17.8h, v5.8h // a0[0..7] >= a3[0..7] ? a0[0..7]-a3[0..7] : 0 (a0 > a3 in all cases where filtering is enabled, so makes more sense to subtract this way round than the opposite and then taking the abs)
1126 uqsub v17.8h, v19.8h, v16.8h // a0[8..15] >= a3[8..15] ? a0[8..15]-a3[8..15] : 0 (a0 > a3 in all cases where filtering is enabled, so makes more sense to subtract this way round than the opposite and then taking the abs)
1313 uqsub v3.8h, v2.8h, v24.8h // a0[8..15] >= a3[8..15] ? a0[8..15]-a3[8..15] : 0 (a0 > a3 in all cases where filtering is enabled, so makes more sense to subtract this way round than the opposite and then taking the abs)
1315 uqsub v17.8h, v5.8h, v20.8h // a0[0..7] >= a3[0..7] ? a0[0..7]-a3[0..7] : 0 (a0 > a3 in all cases where filtering is enabled, so makes more sense to subtract this way round than the opposite and then taking the abs)
H A Dh264dsp_neon.S74 uqsub v22.16B, v18.16B, v24.16B
77 uqsub v22.16B, v2.16B, v24.16B
878 uqsub v24.8h, v24.8h, v31.8h
/third_party/vixl/test/aarch64/
H A Dtest-trace-aarch64.cc2374 __ uqsub(b28, b20, b26); in GenerateTestSequenceNEON()
2375 __ uqsub(d0, d7, d10); in GenerateTestSequenceNEON()
2376 __ uqsub(h26, h24, h7); in GenerateTestSequenceNEON()
2377 __ uqsub(s23, s23, s16); in GenerateTestSequenceNEON()
2378 __ uqsub(v14.V16B(), v16.V16B(), v24.V16B()); in GenerateTestSequenceNEON()
2379 __ uqsub(v11.V2D(), v17.V2D(), v6.V2D()); in GenerateTestSequenceNEON()
2380 __ uqsub(v10.V2S(), v10.V2S(), v8.V2S()); in GenerateTestSequenceNEON()
2381 __ uqsub(v9.V4H(), v15.V4H(), v12.V4H()); in GenerateTestSequenceNEON()
2382 __ uqsub(v23.V4S(), v18.V4S(), v7.V4S()); in GenerateTestSequenceNEON()
2383 __ uqsub(v in GenerateTestSequenceNEON()
[all...]
H A Dtest-cpu-features-aarch64.cc2637 TEST_NEON(uqsub_0, uqsub(v0.V8B(), v1.V8B(), v2.V8B()))
2638 TEST_NEON(uqsub_1, uqsub(v0.V16B(), v1.V16B(), v2.V16B()))
2639 TEST_NEON(uqsub_2, uqsub(v0.V4H(), v1.V4H(), v2.V4H()))
2640 TEST_NEON(uqsub_3, uqsub(v0.V8H(), v1.V8H(), v2.V8H()))
2641 TEST_NEON(uqsub_4, uqsub(v0.V2S(), v1.V2S(), v2.V2S()))
2642 TEST_NEON(uqsub_5, uqsub(v0.V4S(), v1.V4S(), v2.V4S()))
2643 TEST_NEON(uqsub_6, uqsub(v0.V2D(), v1.V2D(), v2.V2D()))
2644 TEST_NEON(uqsub_7, uqsub(b0, b1, b2))
2645 TEST_NEON(uqsub_8, uqsub(h0, h1, h2))
2646 TEST_NEON(uqsub_9, uqsub(s
[all...]
H A Dtest-disasm-sve-aarch64.cc2212 COMPARE(uqsub(z9.VnB(), z13.VnB(), z13.VnB()), "uqsub z9.b, z13.b, z13.b"); in TEST()
2213 COMPARE(uqsub(z11.VnH(), z15.VnH(), z11.VnH()), "uqsub z11.h, z15.h, z11.h"); in TEST()
2214 COMPARE(uqsub(z13.VnS(), z17.VnS(), z13.VnS()), "uqsub z13.s, z17.s, z13.s"); in TEST()
2215 COMPARE(uqsub(z15.VnD(), z19.VnD(), z15.VnD()), "uqsub z15.d, z19.d, z15.d"); in TEST()
3135 COMPARE(uqsub(z10.VnB(), z10.VnB(), 27), "uqsub z1 in TEST()
[all...]
H A Dtest-api-movprfx-aarch64.cc1254 __ uqsub(z9.VnD(), z9.VnD(), 42); in TEST()
1681 __ uqsub(z13.VnH(), z13.VnH(), 42); in TEST()
2367 __ uqsub(z20.VnB(), p0.Merging(), z20.VnB(), z6.VnB()); in TEST()
3545 __ uqsub(z20.VnB(), p0.Merging(), z20.VnB(), z20.VnB()); in TEST()
3688 __ uqsub(z20.VnB(), p0.Merging(), z20.VnB(), z6.VnB()); in TEST()
H A Dtest-simulator-aarch64.cc4641 DEFINE_TEST_NEON_3SAME(uqsub, Basic)
4698 DEFINE_TEST_NEON_3SAME_SCALAR_D(uqsub, Basic)
/third_party/vixl/src/aarch64/
H A Dassembler-aarch64.h2530 void uqsub(const VRegister& vd, const VRegister& vn, const VRegister& vm);
5828 void uqsub(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm);
5831 void uqsub(const ZRegister& zd,
6790 void uqsub(const ZRegister& zd,
H A Dmacro-assembler-sve-aarch64.cc683 V(Uqsub, uqsub) \
H A Dassembler-sve-aarch64.cc2319 void Assembler::uqsub(const ZRegister& zd, in uqsub() function in vixl::aarch64::Assembler
3801 void Assembler::uqsub(const ZRegister& zd, in uqsub() function in vixl::aarch64::Assembler
9424 void Assembler::uqsub(const ZRegister& zd, in uqsub() function in vixl::aarch64::Assembler
H A Dmacro-assembler-aarch64.h2973 V(uqsub, Uqsub) \
6439 uqsub(zd, zn, zm); in Uqsub()
6446 uqsub(zd, zd, imm.AsUint16()); in Uqsub()
H A Dassembler-aarch64.cc4209 V(uqsub, NEON_UQSUB, true) \
/third_party/node/deps/v8/src/codegen/arm64/
H A Dassembler-arm64.h1988 void uqsub(const VRegister& vd, const VRegister& vn, const VRegister& vm);
H A Dmacro-assembler-arm64.h471 V(uqsub, Uqsub) \
H A Dassembler-arm64.cc3105 V(uqsub, NEON_UQSUB, true) \

Completed in 91 milliseconds