| /third_party/ffmpeg/libswscale/aarch64/ |
| H A D | output.S | 52 uqshrn v3.8b, v3.8h, #3 // clip8(val>>19)
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| /third_party/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 2365 __ uqshrn(b21, h27, 7); in GenerateTestSequenceNEON()
2366 __ uqshrn(h28, s26, 11); in GenerateTestSequenceNEON()
2367 __ uqshrn(s13, d31, 17); in GenerateTestSequenceNEON()
2368 __ uqshrn(v21.V2S(), v16.V2D(), 8); in GenerateTestSequenceNEON()
2369 __ uqshrn(v24.V4H(), v24.V4S(), 2); in GenerateTestSequenceNEON()
2370 __ uqshrn(v5.V8B(), v1.V8H(), 8); in GenerateTestSequenceNEON()
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| H A D | test-cpu-features-aarch64.cc | 2628 TEST_NEON(uqshrn_0, uqshrn(v0.V8B(), v1.V8H(), 6))
2629 TEST_NEON(uqshrn_1, uqshrn(v0.V4H(), v1.V4S(), 1))
2630 TEST_NEON(uqshrn_2, uqshrn(v0.V2S(), v1.V2D(), 7))
2634 TEST_NEON(uqshrn_3, uqshrn(b0, h1, 7))
2635 TEST_NEON(uqshrn_4, uqshrn(h0, s1, 11))
2636 TEST_NEON(uqshrn_5, uqshrn(s0, d1, 17))
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| H A D | test-simulator-aarch64.cc | 4798 DEFINE_TEST_NEON_2OPIMM_NARROW(uqshrn, Basic, TypeWidth)
4830 DEFINE_TEST_NEON_2OPIMM_SCALAR_NARROW(uqshrn, Basic, TypeWidth)
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 1384 void uqshrn(const VRegister& vd, const VRegister& vn, int shift);
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| H A D | macro-assembler-arm64.h | 1243 V(uqshrn, Uqshrn) \
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| H A D | assembler-arm64.cc | 1799 void Assembler::uqshrn(const VRegister& vd, const VRegister& vn, int shift) { in uqshrn() function in v8::internal::Assembler
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| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 1965 LogicVRegister uqshrn(VectorFormat vform, LogicVRegister dst,
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| H A D | simulator-arm64.cc | 5780 uqshrn(vf, rd, rn, right_shift);
5930 uqshrn(vf, rd, rn, right_shift);
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| H A D | simulator-logic-arm64.cc | 2229 LogicVRegister Simulator::uqshrn(VectorFormat vform, LogicVRegister dst, in uqshrn() function in v8::internal::Simulator
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| /third_party/vixl/src/aarch64/ |
| H A D | simulator-aarch64.cc | 2717 uqshrn(vform, result, zn, right_shift_dist); in Simulator()
9363 uqshrn(vf, rd, rn, right_shift); in Simulator()
9517 uqshrn(vf, rd, rn, right_shift); in Simulator()
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| H A D | simulator-aarch64.h | 4284 LogicVRegister uqshrn(VectorFormat vform,
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| H A D | assembler-aarch64.h | 3255 void uqshrn(const VRegister& vd, const VRegister& vn, int shift);
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| H A D | assembler-aarch64.cc | 5773 void Assembler::uqshrn(const VRegister& vd, const VRegister& vn, int shift) {
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| H A D | logic-aarch64.cc | 3352 LogicVRegister Simulator::uqshrn(VectorFormat vform,
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| H A D | macro-assembler-aarch64.h | 3184 V(uqshrn, Uqshrn) \
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