Searched refs:uaddlp (Results 1 - 16 of 16) sorted by relevance
| /third_party/ffmpeg/libavcodec/aarch64/ |
| H A D | h264pred_neon.S | 251 uaddlp v0.4h, v0.8b
263 uaddlp v0.4h, v0.8b
276 uaddlp v0.4h, v0.8b
277 uaddlp v1.4h, v1.8b
306 uaddlp v0.8h, v0.16b
322 uaddlp v0.4h, v0.8b
337 uaddlp v0.8h, v0.16b
355 uaddlp v2.4h, v1.8b
|
| /third_party/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 2218 __ uaddlp(v7.V1D(), v9.V2S()); in GenerateTestSequenceNEON()
2219 __ uaddlp(v26.V2D(), v4.V4S()); in GenerateTestSequenceNEON()
2220 __ uaddlp(v28.V2S(), v1.V4H()); in GenerateTestSequenceNEON()
2221 __ uaddlp(v20.V4H(), v31.V8B()); in GenerateTestSequenceNEON()
2222 __ uaddlp(v16.V4S(), v17.V8H()); in GenerateTestSequenceNEON()
2223 __ uaddlp(v6.V8H(), v2.V16B()); in GenerateTestSequenceNEON()
|
| H A D | test-cpu-features-aarch64.cc | 2472 TEST_NEON(uaddlp_0, uaddlp(v0.V4H(), v1.V8B()))
2473 TEST_NEON(uaddlp_1, uaddlp(v0.V8H(), v1.V16B()))
2474 TEST_NEON(uaddlp_2, uaddlp(v0.V2S(), v1.V4H()))
2475 TEST_NEON(uaddlp_3, uaddlp(v0.V4S(), v1.V8H()))
2476 TEST_NEON(uaddlp_4, uaddlp(v0.V1D(), v1.V2S()))
2477 TEST_NEON(uaddlp_5, uaddlp(v0.V2D(), v1.V4S()))
|
| H A D | test-simulator-aarch64.cc | 4872 DEFINE_TEST_NEON_2DIFF_LONG(uaddlp, Basic)
|
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 1925 void uaddlp(const VRegister& vd, const VRegister& vn);
|
| H A D | macro-assembler-arm64.h | 314 V(uaddlp, Uaddlp) \
|
| H A D | assembler-arm64.cc | 2001 void Assembler::uaddlp(const VRegister& vd, const VRegister& vn) { in uaddlp() function in v8::internal::Assembler
|
| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 1733 LogicVRegister uaddlp(VectorFormat vform, LogicVRegister dst,
|
| H A D | simulator-arm64.cc | 3990 uaddlp(vf_lp, rd, rn);
|
| H A D | simulator-logic-arm64.cc | 1961 LogicVRegister Simulator::uaddlp(VectorFormat vform, LogicVRegister dst, in uaddlp() function in v8::internal::Simulator
|
| /third_party/vixl/src/aarch64/ |
| H A D | simulator-aarch64.h | 3678 LogicVRegister uaddlp(VectorFormat vform,
|
| H A D | assembler-aarch64.h | 2980 void uaddlp(const VRegister& vd, const VRegister& vn);
|
| H A D | assembler-aarch64.cc | 5305 void Assembler::uaddlp(const VRegister& vd, const VRegister& vn) {
|
| H A D | logic-aarch64.cc | 2470 LogicVRegister Simulator::uaddlp(VectorFormat vform,
|
| H A D | macro-assembler-aarch64.h | 3064 V(uaddlp, Uaddlp) \
|
| H A D | simulator-aarch64.cc | 7020 uaddlp(vf_lp, rd, rn); in Simulator()
|
Completed in 125 milliseconds