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Searched refs:uaba (Results 1 - 20 of 20) sorted by relevance

/third_party/ffmpeg/libavcodec/aarch64/
H A Dme_cmp_neon.S196 uaba v6.8h, v8.8h, v17.8h // absolute difference accumulate 8..15
/third_party/vixl/test/aarch64/
H A Dtest-trace-aarch64.cc2182 __ uaba(v31.V16B(), v12.V16B(), v28.V16B()); in GenerateTestSequenceNEON()
2183 __ uaba(v18.V2S(), v5.V2S(), v14.V2S()); in GenerateTestSequenceNEON()
2184 __ uaba(v9.V4H(), v20.V4H(), v21.V4H()); in GenerateTestSequenceNEON()
2185 __ uaba(v6.V4S(), v20.V4S(), v2.V4S()); in GenerateTestSequenceNEON()
2186 __ uaba(v16.V8B(), v12.V8B(), v5.V8B()); in GenerateTestSequenceNEON()
2187 __ uaba(v15.V8H(), v26.V8H(), v30.V8H()); in GenerateTestSequenceNEON()
H A Dtest-cpu-features-aarch64.cc2448 TEST_NEON(uaba_0, uaba(v0.V8B(), v1.V8B(), v2.V8B()))
2449 TEST_NEON(uaba_1, uaba(v0.V16B(), v1.V16B(), v2.V16B()))
2450 TEST_NEON(uaba_2, uaba(v0.V4H(), v1.V4H(), v2.V4H()))
2451 TEST_NEON(uaba_3, uaba(v0.V8H(), v1.V8H(), v2.V8H()))
2452 TEST_NEON(uaba_4, uaba(v0.V2S(), v1.V2S(), v2.V2S()))
2453 TEST_NEON(uaba_5, uaba(v0.V4S(), v1.V4S(), v2.V4S()))
H A Dtest-api-movprfx-aarch64.cc2286 __ uaba(z23.VnB(), z22.VnB(), z20.VnB()); in TEST()
3084 __ uaba(z23.VnB(), z22.VnB(), z20.VnB()); in TEST()
3467 __ uaba(z23.VnB(), z22.VnB(), z23.VnB()); in TEST()
H A Dtest-disasm-sve-aarch64.cc6231 COMPARE(uaba(z23.VnB(), z22.VnB(), z20.VnB()), "uaba z23.b, z22.b, z20.b"); in TEST()
6232 COMPARE(uaba(z23.VnD(), z22.VnD(), z20.VnD()), "uaba z23.d, z22.d, z20.d"); in TEST()
6233 COMPARE(uaba(z23.VnH(), z22.VnH(), z20.VnH()), "uaba z23.h, z22.h, z20.h"); in TEST()
6234 COMPARE(uaba(z23.VnS(), z22.VnS(), z20.VnS()), "uaba z23.s, z22.s, z20.s"); in TEST()
6264 "uaba z12.b, z3.b, z30.b"); in TEST()
6266 "uaba z1 in TEST()
[all...]
H A Dtest-simulator-aarch64.cc4651 DEFINE_TEST_NEON_3SAME_NO2D(uaba, Basic)
/third_party/node/deps/v8/src/execution/arm64/
H A Dsimulator-logic-arm64.cc1857 LogicVRegister Simulator::uaba(VectorFormat vform, LogicVRegister dst, in uaba() function in v8::internal::Simulator
2479 uaba(vform, dst, temp1, temp2); in uabal()
2489 uaba(vform, dst, temp1, temp2); in uabal2()
H A Dsimulator-arm64.h1955 LogicVRegister uaba(VectorFormat vform, LogicVRegister dst,
H A Dsimulator-arm64.cc4371 uaba(vf, rd, rn, rm);
/third_party/node/deps/v8/src/codegen/arm64/
H A Dassembler-arm64.h1176 void uaba(const VRegister& vd, const VRegister& vn, const VRegister& vm);
H A Dmacro-assembler-arm64.h448 V(uaba, Uaba) \
H A Dassembler-arm64.cc3089 V(uaba, NEON_UABA, vd.IsVector() && !vd.IsLaneSizeD()) \
/third_party/vixl/src/aarch64/
H A Dmacro-assembler-sve-aarch64.cc1801 V(Uaba, uaba, AbsoluteDifferenceAccumulate) \
H A Dlogic-aarch64.cc2328 LogicVRegister Simulator::uaba(VectorFormat vform,
3671 uaba(vform, dst, temp1, temp2);
3683 uaba(vform, dst, temp1, temp2);
H A Dassembler-aarch64.h2494 void uaba(const VRegister& vd, const VRegister& vn, const VRegister& vm);
6625 void uaba(const ZRegister& zda, const ZRegister& zn, const ZRegister& zm);
H A Dsimulator-aarch64.h4264 LogicVRegister uaba(VectorFormat vform,
H A Dsimulator-aarch64.cc3170 uaba(vform, zda, zn, zm); in Simulator()
7541 uaba(vf, rd, rn, rm); in Simulator()
H A Dassembler-aarch64.cc4193 V(uaba, NEON_UABA, vd.IsVector() && !vd.IsLaneSizeD()) \
H A Dassembler-sve-aarch64.cc8989 void Assembler::uaba(const ZRegister& zda, in uaba() function in vixl::aarch64::Assembler
H A Dmacro-assembler-aarch64.h2948 V(uaba, Uaba) \

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