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Searched refs:tfe (Results 1 - 17 of 17) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/v3d/
H A Dv3dx_job.c62 cl_emit(&job->bcl, TRANSFORM_FEEDBACK_SPECS, tfe) { in bcl_epilogue()
63 tfe.enable = false; in bcl_epilogue()
H A Dv3dx_emit.c753 cl_emit(&job->bcl, TRANSFORM_FEEDBACK_SPECS, tfe) { in emit_state()
754 tfe.number_of_16_bit_output_data_specs_following = in emit_state()
756 tfe.enable = tf_enabled; in emit_state()
759 cl_emit(&job->bcl, TRANSFORM_FEEDBACK_ENABLE, tfe) { in emit_state()
760 tfe.number_of_32_bit_output_buffer_address_following = in emit_state()
762 tfe.number_of_16_bit_output_data_specs_following = in emit_state()
771 cl_emit(&job->bcl, TRANSFORM_FEEDBACK_SPECS, tfe) { in emit_state()
772 tfe.enable = false; in emit_state()
/third_party/mesa3d/src/amd/compiler/
H A Daco_opt_value_numbering.cpp257 aM.glc == bM.glc && aM.dlc == bM.dlc && aM.slc == bM.slc && aM.tfe == bM.tfe && in operator ()()
265 aM.tfe == bM.tfe && aM.lds == bM.lds && aM.disable_wqm == bM.disable_wqm; in operator ()()
271 aM.glc == bM.glc && aM.slc == bM.slc && aM.tfe == bM.tfe && aM.da == bM.da && in operator ()()
H A Daco_assembler.cpp402 encoding |= (mubuf.tfe ? 1 : 0) << 23; in emit_instruction()
435 encoding |= (mtbuf.tfe ? 1 : 0) << 23; in emit_instruction()
460 encoding |= mimg.tfe ? 1 << 16 : 0; in emit_instruction()
H A Daco_print_ir.cpp382 if (mubuf.tfe) in print_instr_format_specific()
383 fprintf(output, " tfe"); in print_instr_format_specific()
417 if (mimg.tfe) in print_instr_format_specific()
418 fprintf(output, " tfe"); in print_instr_format_specific()
546 if (mtbuf.tfe) in print_instr_format_specific()
547 fprintf(output, " tfe"); in print_instr_format_specific()
H A Daco_ir.h1569 bool tfe : 1; /* texture fail enable */
1597 uint16_t tfe : 1; /* texture fail enable */
1622 bool tfe : 1; /* texture fail enable */
H A Daco_instruction_selection.cpp6283 load->tfe = is_sparse;
6284 if (load->tfe)
6305 load->tfe = is_sparse;
9827 mubuf->tfe = instr->is_sparse;
9828 if (mubuf->tfe)
9869 tex->tfe = instr->is_sparse;
10035 tex->tfe = instr->is_sparse;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
H A DSIAddIMGInit.cpp10 /// Any MIMG instructions that use tfe or lwe require an initialization of the
79 MachineOperand *TFE = TII->getNamedOperand(MI, AMDGPU::OpName::tfe); in runOnMachineFunction()
83 // Check for instructions that don't have tfe or lwe fields in runOnMachineFunction()
85 assert( (TFE && LWE) && "Expected tfe and lwe operands in instruction"); in runOnMachineFunction()
H A DSIShrinkInstructions.cpp272 int TFEIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::tfe); in shrinkMIMG()
H A DSILoadStoreOptimizer.cpp664 // Ignore instructions with tfe/lwe set. in dmasksCanBeCombined()
665 const auto *TFEOp = TII.getNamedOperand(*CI.I, AMDGPU::OpName::tfe); in dmasksCanBeCombined()
1255 .addImm(0) // tfe in mergeBufferLoadPair()
1321 .addImm(0) // tfe in mergeTBufferLoadPair()
1400 .addImm(0) // tfe in mergeTBufferStorePair()
1559 .addImm(0) // tfe in mergeBufferStorePair()
H A DSIInstrInfo.cpp3408 const MachineOperand *TFE = getNamedOperand(MI, AMDGPU::OpName::tfe);
4787 getNamedOperand(MI, AMDGPU::OpName::tfe)) {
H A DSIISelLowering.cpp5608 Ops.push_back(TFE); // tfe in lowerImage()
10140 unsigned TFEIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::tfe) - 1; in adjustWritemask()
/third_party/mesa3d/src/amd/llvm/
H A Dac_llvm_build.h272 bool can_speculate, bool d16, bool tfe);
399 bool tfe : 1; member
H A Dac_nir_to_llvm.c1577 assert((!args->tfe || !args->d16) && "unsupported"); in build_tex_intrinsic()
1591 args->tfe); in build_tex_intrinsic()
2606 args.tfe = instr->intrinsic == nir_intrinsic_image_deref_sparse_load || in visit_image_load()
2624 args.tfe); in visit_image_load()
2625 res = ac_build_expand(&ctx->ac, res, num_channels, args.tfe ? 5 : 4); in visit_image_load()
2649 if (args.tfe) { in visit_image_load()
2661 res = ac_build_gather_values(&ctx->ac, values, 4 + args.tfe); in visit_image_load()
4964 args.tfe = instr->is_sparse; in visit_tex()
H A Dac_llvm_build.c1344 bool can_speculate, bool d16, bool tfe) in ac_build_buffer_load_format()
1346 if (tfe) { in ac_build_buffer_load_format()
1361 "buffer_load_format_xyzw v[0:3], $1, $2, 0, idxen offen %s %s tfe %s\n" in ac_build_buffer_load_format()
2181 if (a->tfe) { in ac_build_image_opcode()
2225 args[num_args++] = a->tfe ? ctx->i32_1 : ctx->i32_0; /* texfailctrl */ in ac_build_image_opcode()
2318 if (a->tfe) { in ac_build_image_opcode()
1341 ac_build_buffer_load_format(struct ac_llvm_context *ctx, LLVMValueRef rsrc, LLVMValueRef vindex, LLVMValueRef voffset, unsigned num_channels, unsigned cache_policy, bool can_speculate, bool d16, bool tfe) ac_build_buffer_load_format() argument
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp476 AMDGPU::OpName::tfe); in convertMIMGInst()
526 // FIXME: Add tfe support in convertMIMGInst()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp2951 int TFEIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::tfe); in validateMIMGDataSize()
3490 "image data size does not match dmask and tfe"); in validateInstruction()
5898 if (!IsLdsOpcode) { // tfe is not legal with lds opcodes
6091 {"tfe", AMDGPUOperand::ImmTyTFE, true, nullptr},

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