Home
last modified time | relevance | path

Searched refs:tcs_in_out_eq (Results 1 - 10 of 10) sorted by relevance

/third_party/mesa3d/src/amd/common/
H A Dac_nir_lower_tess_io_to_mem.c132 bool tcs_in_out_eq; member
262 /* NOTE: don't remove the store_output intrinsic on GFX9+ when tcs_in_out_eq, in lower_ls_output_store()
265 if (!st->tcs_in_out_eq) in lower_ls_output_store()
283 if (!st->tcs_in_out_eq) in filter_load_tcs_per_vertex_input()
286 /* tcs_in_out_eq: a same-invocation input load, without indirect offset, in filter_load_tcs_per_vertex_input()
675 bool tcs_in_out_eq, in ac_nir_lower_ls_outputs_to_mem()
681 .tcs_in_out_eq = tcs_in_out_eq, in ac_nir_lower_ls_outputs_to_mem()
682 .tcs_temp_only_inputs = tcs_in_out_eq ? tcs_temp_only_inputs : 0, in ac_nir_lower_ls_outputs_to_mem()
695 bool tcs_in_out_eq) in ac_nir_lower_hs_inputs_to_mem()
673 ac_nir_lower_ls_outputs_to_mem(nir_shader *shader, ac_nir_map_io_driver_location map, bool tcs_in_out_eq, uint64_t tcs_temp_only_inputs) ac_nir_lower_ls_outputs_to_mem() argument
693 ac_nir_lower_hs_inputs_to_mem(nir_shader *shader, ac_nir_map_io_driver_location map, bool tcs_in_out_eq) ac_nir_lower_hs_inputs_to_mem() argument
[all...]
H A Dac_nir.h75 bool tcs_in_out_eq,
81 bool tcs_in_out_eq);
/third_party/mesa3d/src/amd/compiler/
H A Daco_instruction_selection.h107 bool tcs_in_out_eq = false; member
H A Daco_shader_info.h114 bool tcs_in_out_eq; member
H A Daco_instruction_selection_setup.cpp304 ctx->tcs_in_out_eq = ctx->program->info.vs.tcs_in_out_eq; in setup_tcs_info()
H A Daco_instruction_selection.cpp5218 if (ctx->shader->info.stage != MESA_SHADER_TESS_CTRL || !ctx->tcs_in_out_eq)
11950 ctx.tcs_in_out_eq ? i == 0 : (shader_count >= 2 && !empty_shader && !(ngg_gs && i == 1));
11952 ctx.tcs_in_out_eq ? i == 1 : (check_merged_wave_info && !(ngg_gs && i == 1));
12019 if (i == 0 && ctx.stage == vertex_tess_control_hs && ctx.tcs_in_out_eq) {
/third_party/mesa3d/src/amd/vulkan/
H A Dradv_aco_shader_info.h82 ASSIGN_FIELD(vs.tcs_in_out_eq); in radv_aco_convert_shader_info()
H A Dradv_shader.h270 bool tcs_in_out_eq; member
H A Dradv_shader.c1167 NIR_PASS_V(nir, ac_nir_lower_ls_outputs_to_mem, NULL, info->vs.tcs_in_out_eq, in radv_lower_io_to_mem()
1177 NIR_PASS_V(nir, ac_nir_lower_hs_inputs_to_mem, NULL, info->vs.tcs_in_out_eq); in radv_lower_io_to_mem()
H A Dradv_pipeline.c3845 * We don't set tcs_in_out_eq if the float controls differ because that might in gather_tess_info()
3849 stages[MESA_SHADER_VERTEX].info.vs.tcs_in_out_eq = in gather_tess_info()
3855 if (stages[MESA_SHADER_VERTEX].info.vs.tcs_in_out_eq) in gather_tess_info()
3864 stages[MESA_SHADER_TESS_CTRL].info.vs.tcs_in_out_eq = stages[MESA_SHADER_VERTEX].info.vs.tcs_in_out_eq; in gather_tess_info()

Completed in 33 milliseconds