| /third_party/ffmpeg/libavcodec/arm/ |
| H A D | vp8dsp_armv6.S | 127 sxth r6, r8
128 sxth r12, r7
129 sxth r1, r9
130 sxth r10, r4
160 sxth r2, r2
161 sxth lr, lr
162 sxth r3, r3
163 sxth r5, r5
284 sxth r12, r12
286 sxth r
[all...] |
| H A D | vp8_armv6.S | 90 sxth r12, r11
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| /third_party/node/deps/v8/src/diagnostics/arm/ |
| H A D | disasm-arm.cc | 1152 Format(instr, "sxth'cond 'rd, 'rm"); in DecodeType3()
1155 Format(instr, "sxth'cond 'rd, 'rm, ror #8"); in DecodeType3()
1158 Format(instr, "sxth'cond 'rd, 'rm, ror #16"); in DecodeType3()
1161 Format(instr, "sxth'cond 'rd, 'rm, ror #24"); in DecodeType3()
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| /third_party/vixl/test/aarch32/ |
| H A D | test-assembler-cond-rd-operand-rn-t32.cc | 62 M(sxth) \
344 #include "aarch32/traces/assembler-cond-rd-operand-rn-sxth-t32.h"
|
| H A D | test-assembler-cond-rd-operand-rn-a32.cc | 62 M(sxth) \
1119 #include "aarch32/traces/assembler-cond-rd-operand-rn-sxth-a32.h"
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| H A D | test-assembler-cond-rd-operand-rn-ror-amount-a32.cc | 54 M(sxth) \
1319 #include "aarch32/traces/assembler-cond-rd-operand-rn-ror-amount-sxth-a32.h"
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| H A D | test-assembler-cond-rd-operand-rn-ror-amount-t32.cc | 54 M(sxth) \
1207 #include "aarch32/traces/assembler-cond-rd-operand-rn-ror-amount-sxth-t32.h"
|
| /third_party/vixl/src/aarch32/ |
| H A D | assembler-aarch32.h | 3588 void sxth(Condition cond,
3592 void sxth(Register rd, const Operand& operand) { in sxth() function in vixl::aarch32::Assembler
3593 sxth(al, Best, rd, operand); in sxth()
3595 void sxth(Condition cond, Register rd, const Operand& operand) { in sxth() function in vixl::aarch32::Assembler
3596 sxth(cond, Best, rd, operand); in sxth()
3598 void sxth(EncodingSize size, Register rd, const Operand& operand) { in sxth() function in vixl::aarch32::Assembler
3599 sxth(al, size, rd, operand); in sxth()
|
| H A D | disasm-aarch32.h | 1360 void sxth(Condition cond,
|
| H A D | disasm-aarch32.cc | 3284 void Disassembler::sxth(Condition cond, in sxth() function in vixl::aarch32::Disassembler
8051 sxth(CurrentCond(), in DecodeT32()
20703 sxth(CurrentCond(), in DecodeT32()
20712 sxth(CurrentCond(), in DecodeT32()
[all...] |
| /third_party/node/deps/v8/src/wasm/baseline/arm64/ |
| H A D | liftoff-assembler-arm64.h | 1536 sxth(dst.W(), src.W()); in emit_i32_signextend_i16()
1546 sxth(dst.gp(), src.gp()); in emit_i64_signextend_i16()
|
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | macro-assembler-arm64-inl.h | 968 sxth(rd, rn); in Sxth()
|
| H A D | assembler-arm64.h | 641 void sxth(const Register& rd, const Register& rn) { sbfm(rd, rn, 0, 15); }
|
| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | assembler-arm.h | 578 void sxth(Register dst, Register src, int rotate = 0, Condition cond = al);
|
| H A D | assembler-arm.cc | 1956 void Assembler::sxth(Register dst, Register src, int rotate, Condition cond) { in sxth() function in v8::internal::Assembler
|
| /third_party/vixl/test/aarch64/ |
| H A D | test-disasm-aarch64.cc | 339 COMPARE(adds(w21, w22, Operand(w23, SXTH, 2)), "adds w21, w22, w23, sxth #2"); in TEST()
343 COMPARE(cmn(x2, Operand(x3, SXTH, 4)), "cmn x2, w3, sxth #4"); in TEST()
365 COMPARE(subs(w21, w22, Operand(w23, SXTH, 2)), "subs w21, w22, w23, sxth #2"); in TEST()
530 COMPARE(sxth(w4, w5), "sxth w4, w5"); in TEST()
531 COMPARE(sxth(x6, x7), "sxth x6, w7"); in TEST()
534 COMPARE(sxth(x2, w3), "sxth x2, w3"); in TEST()
2468 "sxth x1 in TEST()
[all...] |
| H A D | test-api-movprfx-aarch64.cc | 277 __ sxth(z14.VnD(), p6.Merging(), z14.VnD()); in TEST()
837 __ sxth(z11.VnS(), p7.Merging(), z26.VnS()); in TEST()
1615 __ sxth(z11.VnD(), p6.Merging(), z25.VnD()); in TEST()
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| H A D | test-trace-aarch64.cc | 351 __ sxth(w12, w13); in GenerateTestSequenceBase()
352 __ sxth(x14, x15); in GenerateTestSequenceBase()
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| H A D | test-cpu-features-aarch64.cc | 499 TEST_NONE(sxth_0, sxth(w0, w1))
500 TEST_NONE(sxth_1, sxth(x0, w1))
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| H A D | test-disasm-sve-aarch64.cc | 2989 COMPARE(sxth(z6.VnS(), p1.Merging(), z17.VnS()), "sxth z6.s, p1/m, z17.s"); in TEST()
2990 COMPARE(sxth(z8.VnD(), p6.Merging(), z2.VnD()), "sxth z8.d, p6/m, z2.d"); in TEST()
3001 COMPARE(dci(0x0412a000), "unallocated (Unallocated)"); // sxth b in TEST()
3002 COMPARE(dci(0x0452a000), "unallocated (Unallocated)"); // sxth h in TEST()
|
| /third_party/vixl/src/aarch64/ |
| H A D | assembler-aarch64.h | 845 void sxth(const Register& rd, const Register& rn) { sbfm(rd, rn, 0, 15); } in sxth() function in vixl::aarch64::Assembler
5662 void sxth(const ZRegister& zd, const PRegisterM& pg, const ZRegister& zn);
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| H A D | macro-assembler-aarch64.h | 2618 sxth(rd, rn); in Sxth()
6225 sxth(zd, pg, zn); in Sxth()
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| H A D | assembler-sve-aarch64.cc | 3486 void Assembler::sxth(const ZRegister& zd, in sxth() function in vixl::aarch64::Assembler
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| /third_party/node/deps/v8/src/compiler/backend/arm/ |
| H A D | code-generator-arm.cc | 1160 __ sxth(i.OutputRegister(), i.InputRegister(0), i.InputInt32(1)); in AssembleArchInstruction()
3364 __ sxth(i.OutputRegister(0), i.OutputRegister(0)); in AssembleArchInstruction()
3390 __ sxth(i.OutputRegister(0), i.OutputRegister(0)); in AssembleArchInstruction()
3413 __ sxth(i.OutputRegister(0), i.OutputRegister(0)); \ in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/wasm/baseline/arm/ |
| H A D | liftoff-assembler-arm.h | 2184 sxth(dst, src); in emit_i32_signextend_i16()
|