Home
last modified time | relevance | path

Searched refs:subslice_slice_stride (Results 1 - 3 of 3) sorted by relevance

/third_party/mesa3d/src/intel/dev/
H A Dintel_device_info.c1099 devinfo->subslice_slice_stride = 0; in reset_masks()
1121 for (int b = 0; b < devinfo->subslice_slice_stride; b++) { in update_slice_subslice_counts()
1123 __builtin_popcount(devinfo->subslice_masks[s * devinfo->subslice_slice_stride + b]); in update_slice_subslice_counts()
1155 devinfo->max_subslices_per_slice * devinfo->subslice_slice_stride; in update_pixel_pipes()
1229 devinfo->subslice_slice_stride = 1; in update_from_single_slice_topology()
1250 geom_subslice_masks[s * devinfo->subslice_slice_stride + in update_from_single_slice_topology()
1260 devinfo->subslice_masks[s * devinfo->subslice_slice_stride + in update_from_single_slice_topology()
1293 devinfo->subslice_slice_stride = topology->subslice_stride; in update_from_topology()
H A Dintel_device_info.h246 * An array of bit mask of the subslices available, use subslice_slice_stride
269 uint16_t subslice_slice_stride; member
448 return (devinfo->subslice_masks[slice * devinfo->subslice_slice_stride + in intel_device_info_subslice_available()
/third_party/mesa3d/src/intel/perf/
H A Dintel_perf.c391 for (int ss = 0; ss < (devinfo->subslice_slice_stride * 8); ss++) { in compute_topology_builtins()

Completed in 6 milliseconds