| /third_party/vixl/src/aarch64/ |
| H A D | simulator-aarch64.cc | 3031 sqdmlsl(kFormatVnD, zda, zn_b, zm_idx); in Simulator()
3034 sqdmlsl(kFormatVnD, zda, zn_t, zm_idx); in Simulator()
3102 sqdmlsl(kFormatVnS, zda, zn_b, zm_idx); in Simulator()
3105 sqdmlsl(kFormatVnS, zda, zn_t, zm_idx); in Simulator()
3283 sqdmlsl(vform, zda, zn_b, zm_b); in Simulator()
3286 sqdmlsl(vform, zda, zn_b, zm_t); in Simulator()
3289 sqdmlsl(vform, zda, zn_t, zm_t); in Simulator()
7804 sqdmlsl(vf_l, rd, rn, rm); in Simulator()
7994 sqdmlsl(vf, rd, rn, temp, is_2); in Simulator()
8969 sqdmlsl(v in Simulator()
[all...] |
| H A D | simulator-aarch64.h | 3564 LogicVRegister sqdmlsl(VectorFormat vform,
4460 V(sqdmlsl) \
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| H A D | logic-aarch64.cc | 844 LogicVRegister Simulator::sqdmlsl(VectorFormat vform, in sqdmlsl() function in vixl::aarch64::Simulator
852 return sqdmlsl(vform, dst, src1, dup_element(indexform, temp, src2, index)); in sqdmlsl()
3905 LogicVRegister Simulator::sqdmlsl(VectorFormat vform,
3920 return sqdmlsl(vform, dst, src1, src2, /* is_2 = */ true);
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| H A D | assembler-aarch64.h | 2665 void sqdmlsl(const VRegister& vd,
3369 void sqdmlsl(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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| H A D | assembler-aarch64.cc | 2995 V(sqdmlsl, NEON_SQDMLSL, vn.Is1H() || vn.Is1S() || vn.Is4H() || vn.Is2S()) \
4810 V(sqdmlsl, NEON_SQDMLSL_byelement, vn.IsScalar() || vn.IsD()) \
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| H A D | macro-assembler-aarch64.h | 2923 V(sqdmlsl, Sqdmlsl) \
3127 V(sqdmlsl, Sqdmlsl) \
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| /third_party/vixl/test/aarch64/ |
| H A D | test-simulator-aarch64.cc | 4738 DEFINE_TEST_NEON_3DIFF_LONG_SD(sqdmlsl, Basic)
4757 DEFINE_TEST_NEON_3DIFF_SCALAR_LONG_SD(sqdmlsl, Basic)
4974 DEFINE_TEST_NEON_BYELEMENT_DIFF(sqdmlsl, Basic, Basic, Basic)
4997 DEFINE_TEST_NEON_BYELEMENT_DIFF_SCALAR(sqdmlsl, Basic, Basic, Basic)
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| H A D | test-trace-aarch64.cc | 1557 __ sqdmlsl(d10, s29, s20); in GenerateTestSequenceNEON()
1558 __ sqdmlsl(d10, s9, v10.S(), 1); in GenerateTestSequenceNEON()
1559 __ sqdmlsl(s30, h9, h24); in GenerateTestSequenceNEON()
1560 __ sqdmlsl(s13, h24, v6.H(), 1); in GenerateTestSequenceNEON()
1561 __ sqdmlsl(v27.V2D(), v10.V2S(), v20.V2S()); in GenerateTestSequenceNEON()
1562 __ sqdmlsl(v23.V2D(), v23.V2S(), v3.S(), 3); in GenerateTestSequenceNEON()
1563 __ sqdmlsl(v7.V4S(), v17.V4H(), v29.V4H()); in GenerateTestSequenceNEON()
1564 __ sqdmlsl(v22.V4S(), v21.V4H(), v3.H(), 4); in GenerateTestSequenceNEON()
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| H A D | test-cpu-features-aarch64.cc | 1767 TEST_NEON(sqdmlsl_0, sqdmlsl(v0.V4S(), v1.V4H(), v2.H(), 6))
1768 TEST_NEON(sqdmlsl_1, sqdmlsl(v0.V2D(), v1.V2S(), v2.S(), 0))
1771 TEST_NEON(sqdmlsl_2, sqdmlsl(s0, h1, v2.H(), 1))
1772 TEST_NEON(sqdmlsl_3, sqdmlsl(d0, s1, v2.S(), 2))
1773 TEST_NEON(sqdmlsl_4, sqdmlsl(v0.V4S(), v1.V4H(), v2.V4H()))
1774 TEST_NEON(sqdmlsl_5, sqdmlsl(v0.V2D(), v1.V2S(), v2.V2S()))
1777 TEST_NEON(sqdmlsl_6, sqdmlsl(s0, h1, h2))
1778 TEST_NEON(sqdmlsl_7, sqdmlsl(d0, s1, s2))
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 1055 void sqdmlsl(const VRegister& vd, const VRegister& vn, const VRegister& vm,
1105 void sqdmlsl(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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| H A D | macro-assembler-arm64.h | 228 V(sqdmlsl, Sqdmlsl) \
426 V(sqdmlsl, Sqdmlsl) \
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| H A D | assembler-arm64.cc | 1501 V(sqdmlsl, NEON_SQDMLSL, vn.Is1H() || vn.Is1S() || vn.Is4H() || vn.Is2S()) \
3360 V(sqdmlsl, NEON_SQDMLSL_byelement, vn.IsScalar() || vn.IsD()) \
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| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 1678 LogicVRegister sqdmlsl(VectorFormat vform, LogicVRegister dst,
2028 V(sqdmlsl) \
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| H A D | simulator-arm64.cc | 4540 sqdmlsl(vf_l, rd, rn, rm);
4759 Op = &Simulator::sqdmlsl;
5487 sqdmlsl(vf, rd, rn, rm);
5636 Op = &Simulator::sqdmlsl;
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| H A D | simulator-logic-arm64.cc | 879 LogicVRegister Simulator::sqdmlsl(VectorFormat vform, LogicVRegister dst, in sqdmlsl() function in v8::internal::Simulator
885 return sqdmlsl(vform, dst, src1, dup_element(indexform, temp, src2, index)); in sqdmlsl()
2689 LogicVRegister Simulator::sqdmlsl(VectorFormat vform, LogicVRegister dst, in sqdmlsl() function in v8::internal::Simulator
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