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Searched refs:sqdecp (Results 1 - 5 of 5) sorted by relevance

/third_party/vixl/test/aarch64/
H A Dtest-disasm-sve-aarch64.cc2030 COMPARE(sqdecp(x12, p7.VnB(), w12), "sqdecp x12, p7.b, w12"); in TEST()
2031 COMPARE(sqdecp(x12, p7.VnH(), w12), "sqdecp x12, p7.h, w12"); in TEST()
2032 COMPARE(sqdecp(x12, p7.VnS(), w12), "sqdecp x12, p7.s, w12"); in TEST()
2033 COMPARE(sqdecp(x12, p7.VnD(), w12), "sqdecp x12, p7.d, w12"); in TEST()
2034 COMPARE(sqdecp(x30, p5.VnB()), "sqdecp x3 in TEST()
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H A Dtest-api-movprfx-aarch64.cc1185 __ sqdecp(z7.VnS(), p2); in TEST()
1579 __ sqdecp(z16.VnS(), p1); in TEST()
/third_party/vixl/src/aarch64/
H A Dassembler-aarch64.h5403 void sqdecp(const Register& xd,
5408 void sqdecp(const Register& xdn, const PRegisterWithLaneSize& pg);
5411 void sqdecp(const ZRegister& zdn, const PRegister& pg);
H A Dassembler-sve-aarch64.cc2072 void Assembler::sqdecp(const Register& xd, in sqdecp() function in vixl::aarch64::Assembler
2087 void Assembler::sqdecp(const Register& xdn, const PRegisterWithLaneSize& pg) { in sqdecp() function in vixl::aarch64::Assembler
2099 void Assembler::sqdecp(const ZRegister& zdn, const PRegister& pg) { in sqdecp() function in vixl::aarch64::Assembler
H A Dmacro-assembler-aarch64.h5921 sqdecp(xdn, pg, wdn); in Sqdecp()
5926 sqdecp(xdn, pg); in Sqdecp()
5931 // `sqdecp` writes every lane, so use an unpredicated movprfx. in Sqdecp()
5933 sqdecp(zd, pg); in Sqdecp()
6355 // `sqdecp` writes every lane, so use an unpredicated movprfx. in Uqdecp()

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