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Searched refs:spilling (Results 1 - 3 of 3) sorted by relevance

/third_party/mesa3d/src/freedreno/ir3/
H A Dir3_spill.c124 /* When spilling, we need to reserve a register to serve as the zero'd
139 bool spilling; member
261 * prioritized for spilling, as per the paper. This just needs to be in compute_block_next_distance()
456 if (ctx->spilling) { in interval_add()
463 if (ctx->spilling) { in interval_add()
483 if (ctx->spilling) { in interval_delete()
489 if (ctx->spilling) { in interval_delete()
545 if (ctx->spilling) { in init_dst()
730 /* If spilling an immed/const pcopy src, we need to actually materialize it in spill()
740 d("spilling ssa in spill()
[all...]
/third_party/mesa3d/src/broadcom/compiler/
H A Dvir_register_allocate.c248 /* Discourage spilling of TMU operations */ in v3d_choose_spill_node()
337 * list updated during the spilling process, which generates new temps/nodes.
370 * per-spilling-program BOs, so we need a uniform from the driver for in v3d_setup_spill_base()
386 /* Make sure that we don't spill the spilling setup instructions. */ in v3d_setup_spill_base()
390 /* If we are spilling, update the RA map with the temps added in v3d_setup_spill_base()
395 if (c->spilling) { in v3d_setup_spill_base()
546 c->spilling = true; in v3d_spill_reg()
577 /* We must disable the ldunif optimization if we are spilling uniforms */ in v3d_spill_reg()
716 /* Don't allow spilling of our spilling instruction in v3d_spill_reg()
[all...]
H A Dv3d_compiler.h316 * Returns the the offset of the scratch buffer for register spilling.
800 /* Whether we are in the process of spilling registers for
803 bool spilling;
806 * Register spilling's per-thread base address, shared between each

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