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Searched refs:smaxv (Results 1 - 17 of 17) sorted by relevance

/third_party/vixl/test/aarch64/
H A Dtest-trace-aarch64.cc1466 __ smaxv(b4, v5.V16B()); in GenerateTestSequenceNEON()
1467 __ smaxv(b23, v0.V8B()); in GenerateTestSequenceNEON()
1468 __ smaxv(h6, v0.V4H()); in GenerateTestSequenceNEON()
1469 __ smaxv(h24, v8.V8H()); in GenerateTestSequenceNEON()
1470 __ smaxv(s3, v16.V4S()); in GenerateTestSequenceNEON()
H A Dtest-cpu-features-aarch64.cc1670 TEST_NEON(smaxv_0, smaxv(b0, v1.V8B()))
1671 TEST_NEON(smaxv_1, smaxv(b0, v1.V16B()))
1672 TEST_NEON(smaxv_2, smaxv(h0, v1.V4H()))
1673 TEST_NEON(smaxv_3, smaxv(h0, v1.V8H()))
1674 TEST_NEON(smaxv_4, smaxv(s0, v1.V4S()))
H A Dtest-disasm-sve-aarch64.cc2925 COMPARE(smaxv(b9, p3, z1.VnB()), "smaxv b9, p3, z1.b"); in TEST()
2926 COMPARE(smaxv(h19, p2, z1.VnH()), "smaxv h19, p2, z1.h"); in TEST()
2927 COMPARE(smaxv(s29, p1, z1.VnS()), "smaxv s29, p1, z1.s"); in TEST()
2928 COMPARE(smaxv(d9, p0, z1.VnD()), "smaxv d9, p0, z1.d"); in TEST()
H A Dtest-simulator-aarch64.cc4949 DEFINE_TEST_NEON_ACROSS(smaxv, Basic)
/third_party/vixl/src/aarch64/
H A Dsimulator-aarch64.h3923 LogicVRegister smaxv(VectorFormat vform,
4763 LogicVRegister smaxv(VectorFormat vform,
H A Dassembler-aarch64.h3064 void smaxv(const VRegister& vd, const VRegister& vn);
5320 void smaxv(const VRegister& vd, const PRegister& pg, const ZRegister& zn);
H A Dlogic-aarch64.cc1323 LogicVRegister Simulator::smaxv(VectorFormat vform, in smaxv() function in vixl::aarch64::Simulator
1339 LogicVRegister Simulator::smaxv(VectorFormat vform, in smaxv() function in vixl::aarch64::Simulator
H A Dmacro-assembler-aarch64.h3052 V(smaxv, Smaxv) \
5843 smaxv(vd, pg, zn); in Smaxv()
H A Dsimulator-aarch64.cc7923 smaxv(vf, rd, rn); in Simulator()
11678 smaxv(vform, vd, pg, zn); in Simulator()
H A Dassembler-aarch64.cc5371 V(smaxv, NEON_SMAXV) \
H A Dassembler-sve-aarch64.cc3307 void Assembler::smaxv(const VRegister& vd, in smaxv() function in vixl::aarch64::Assembler
/third_party/node/deps/v8/src/codegen/arm64/
H A Dassembler-arm64.h1212 void smaxv(const VRegister& vd, const VRegister& vn);
H A Dmacro-assembler-arm64.h302 V(smaxv, Smaxv) \
H A Dassembler-arm64.cc2047 V(smaxv, NEON_SMAXV, true) \
/third_party/node/deps/v8/src/execution/arm64/
H A Dsimulator-arm64.h1783 LogicVRegister smaxv(VectorFormat vform, LogicVRegister dst,
H A Dsimulator-arm64.cc4638 smaxv(vf, rd, rn);
H A Dsimulator-logic-arm64.cc1232 LogicVRegister Simulator::smaxv(VectorFormat vform, LogicVRegister dst, in smaxv() function in v8::internal::Simulator

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