Searched refs:saddlp (Results 1 - 16 of 16) sorted by relevance
| /third_party/ffmpeg/libavcodec/aarch64/ |
| H A D | h264pred_neon.S | 214 saddlp v2.4s, v2.8h
584 saddlp v2.4s, v2.8h
|
| /third_party/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 1397 __ saddlp(v10.V1D(), v25.V2S()); in GenerateTestSequenceNEON()
1398 __ saddlp(v15.V2D(), v16.V4S()); in GenerateTestSequenceNEON()
1399 __ saddlp(v18.V2S(), v10.V4H()); in GenerateTestSequenceNEON()
1400 __ saddlp(v29.V4H(), v26.V8B()); in GenerateTestSequenceNEON()
1401 __ saddlp(v10.V4S(), v1.V8H()); in GenerateTestSequenceNEON()
1402 __ saddlp(v0.V8H(), v21.V16B()); in GenerateTestSequenceNEON()
|
| H A D | test-cpu-features-aarch64.cc | 1601 TEST_NEON(saddlp_0, saddlp(v0.V4H(), v1.V8B()))
1602 TEST_NEON(saddlp_1, saddlp(v0.V8H(), v1.V16B()))
1603 TEST_NEON(saddlp_2, saddlp(v0.V2S(), v1.V4H()))
1604 TEST_NEON(saddlp_3, saddlp(v0.V4S(), v1.V8H()))
1605 TEST_NEON(saddlp_4, saddlp(v0.V1D(), v1.V2S()))
1606 TEST_NEON(saddlp_5, saddlp(v0.V2D(), v1.V4S()))
|
| H A D | test-simulator-aarch64.cc | 4841 DEFINE_TEST_NEON_2DIFF_LONG(saddlp, Basic)
|
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 1922 void saddlp(const VRegister& vd, const VRegister& vn);
|
| H A D | macro-assembler-arm64.h | 300 V(saddlp, Saddlp) \
|
| H A D | assembler-arm64.cc | 1997 void Assembler::saddlp(const VRegister& vd, const VRegister& vn) { in saddlp() function in v8::internal::Assembler
|
| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 1731 LogicVRegister saddlp(VectorFormat vform, LogicVRegister dst,
|
| H A D | simulator-arm64.cc | 3987 saddlp(vf_lp, rd, rn);
|
| H A D | simulator-logic-arm64.cc | 1956 LogicVRegister Simulator::saddlp(VectorFormat vform, LogicVRegister dst, in saddlp() function in v8::internal::Simulator
|
| /third_party/vixl/src/aarch64/ |
| H A D | simulator-aarch64.h | 3675 LogicVRegister saddlp(VectorFormat vform,
|
| H A D | assembler-aarch64.h | 2977 void saddlp(const VRegister& vd, const VRegister& vn);
|
| H A D | assembler-aarch64.cc | 5299 void Assembler::saddlp(const VRegister& vd, const VRegister& vn) {
|
| H A D | logic-aarch64.cc | 2463 LogicVRegister Simulator::saddlp(VectorFormat vform,
|
| H A D | macro-assembler-aarch64.h | 3050 V(saddlp, Saddlp) \
|
| H A D | simulator-aarch64.cc | 7017 saddlp(vf_lp, rd, rn); in Simulator()
|
Completed in 111 milliseconds