Home
last modified time | relevance | path

Searched refs:round_mode (Results 1 - 10 of 10) sorted by relevance

/third_party/vixl/src/
H A Dutils-vixl.cc336 FPRounding round_mode, in FPToFloat()
340 VIXL_ASSERT((round_mode == FPTieEven) || (round_mode == FPRoundOdd)); in FPToFloat()
341 USE(round_mode); in FPToFloat()
389 return FPRoundToFloat(sign, exponent, mantissa, round_mode); in FPToFloat()
448 FPRounding round_mode, in FPToFloat16()
452 VIXL_ASSERT(round_mode == FPTieEven); in FPToFloat16()
453 USE(round_mode); in FPToFloat16()
493 return FPRoundToFloat16(sign, exponent, mantissa, round_mode); in FPToFloat16()
503 FPRounding round_mode, in FPToFloat16()
335 FPToFloat(double value, FPRounding round_mode, UseDefaultNaN DN, bool* exception) FPToFloat() argument
447 FPToFloat16(float value, FPRounding round_mode, UseDefaultNaN DN, bool* exception) FPToFloat16() argument
502 FPToFloat16(double value, FPRounding round_mode, UseDefaultNaN DN, bool* exception) FPToFloat16() argument
[all...]
H A Dutils-vixl.h1280 FPRounding round_mode) {
1284 VIXL_ASSERT((round_mode == FPTieEven) || (round_mode == FPRoundOdd));
1358 if (round_mode == FPTieEven) {
1363 VIXL_ASSERT(round_mode == FPRoundOdd);
1392 if (round_mode == FPTieEven) {
1396 VIXL_ASSERT(round_mode == FPRoundOdd);
1417 if (round_mode == FPTieEven) {
1440 VIXL_ASSERT(round_mode == FPRoundOdd);
1467 FPRounding round_mode) {
[all...]
/third_party/mesa3d/src/panfrost/bifrost/valhall/
H A Dvalhall.h98 bool round_mode : 1; member
H A Dva_pack.c520 if (info.round_mode) hex |= (uint64_t) I->round << 30; in va_pack_alu()
/third_party/node/deps/v8/src/execution/arm64/
H A Dsimulator-arm64.h47 FPRounding round_mode) { in FPRound()
58 DCHECK((round_mode == FPTieEven) || (round_mode == FPRoundOdd)); in FPRound()
132 if (round_mode == FPTieEven) { in FPRound()
137 DCHECK_EQ(round_mode, FPRoundOdd); in FPRound()
166 if (round_mode == FPTieEven) { in FPRound()
170 DCHECK_EQ(round_mode, FPRoundOdd); in FPRound()
187 if (round_mode == FPTieEven) { in FPRound()
210 DCHECK_EQ(round_mode, FPRoundOdd); in FPRound()
2183 double FPRoundInt(double value, FPRounding round_mode);
46 FPRound(int64_t sign, int64_t exponent, uint64_t mantissa, FPRounding round_mode) FPRound() argument
[all...]
H A Dsimulator-logic-arm64.cc18 FPRounding round_mode) { in FPRoundToDouble()
20 sign, exponent, mantissa, round_mode); in FPRoundToDouble()
26 FPRounding round_mode) { in FPRoundToFloat()
28 sign, exponent, mantissa, round_mode); in FPRoundToFloat()
34 uint64_t mantissa, FPRounding round_mode) { in FPRoundToFloat16()
36 sign, exponent, mantissa, round_mode); in FPRoundToFloat16()
196 float16 Simulator::FPToFloat16(float value, FPRounding round_mode) { in FPToFloat16() argument
198 DCHECK_EQ(round_mode, FPTieEven); in FPToFloat16()
199 USE(round_mode); in FPToFloat16()
237 return FPRoundToFloat16(sign, exponent, mantissa, round_mode); in FPToFloat16()
17 FPRoundToDouble(int64_t sign, int64_t exponent, uint64_t mantissa, FPRounding round_mode) FPRoundToDouble() argument
25 FPRoundToFloat(int64_t sign, int64_t exponent, uint64_t mantissa, FPRounding round_mode) FPRoundToFloat() argument
33 FPRoundToFloat16(int64_t sign, int64_t exponent, uint64_t mantissa, FPRounding round_mode) FPRoundToFloat16() argument
244 FPToFloat16(double value, FPRounding round_mode) FPToFloat16() argument
292 FPToFloat(double value, FPRounding round_mode) FPToFloat() argument
3152 FPRoundInt(double value, FPRounding round_mode) FPRoundInt() argument
[all...]
/third_party/vixl/src/aarch64/
H A Dsimulator-aarch64.h4838 double FPRoundInt(double value, FPRounding round_mode);
4839 double FPRoundInt(double value, FPRounding round_mode, FrintMode frint_mode);
4840 double FPRoundIntCommon(double value, FPRounding round_mode);
4845 double FixedToDouble(int64_t src, int fbits, FPRounding round_mode);
4846 double UFixedToDouble(uint64_t src, int fbits, FPRounding round_mode);
4847 float FixedToFloat(int64_t src, int fbits, FPRounding round_mode);
4848 float UFixedToFloat(uint64_t src, int fbits, FPRounding round_mode);
4851 FPRounding round_mode);
4854 FPRounding round_mode);
H A Dlogic-aarch64.cc4805 double Simulator::FPRoundIntCommon(double value, FPRounding round_mode) {
4812 switch (round_mode) {
4870 double Simulator::FPRoundInt(double value, FPRounding round_mode) {
4877 return FPRoundIntCommon(value, round_mode);
4881 FPRounding round_mode,
4884 return FPRoundInt(value, round_mode);
4902 double result = FPRoundIntCommon(value, round_mode);
/third_party/mesa3d/src/gallium/drivers/r300/
H A Dr300_state.c1159 uint32_t round_mode; /* R300_GA_ROUND_MODE: 0x428c */ in r300_create_rs_state() local
1304 round_mode = in r300_create_rs_state()
1324 OUT_CB_REG(R300_GA_ROUND_MODE, round_mode); in r300_create_rs_state()
/third_party/skia/third_party/externals/freetype/src/truetype/
H A Dttinterp.c2323 * round_mode ::
2328 FT_Byte round_mode ) in Compute_Round()
2330 switch ( round_mode ) in Compute_Round()

Completed in 38 milliseconds