Searched refs:reglist (Results 1 - 5 of 5) sorted by relevance
/third_party/node/deps/v8/src/codegen/ |
H A D | interface-descriptors.cc | 22 RegList reglist; in InitializeRegisters() local 26 DCHECK(!reglist.has(reg)); in InitializeRegisters() 31 reglist.set(reg); in InitializeRegisters()
|
H A D | reglist-base.h | 219 RegListBase<RegisterT> reglist) { in operator <<() 221 for (bool first = true; !reglist.is_empty(); first = false) { in operator <<() 222 RegisterT reg = reglist.first(); in operator <<() 223 reglist.clear(reg); in operator <<() 218 operator <<(std::ostream& os, RegListBase<RegisterT> reglist) operator <<() argument
|
/third_party/vixl/src/aarch32/ |
H A D | instructions-aarch32.cc | 156 std::ostream& operator<<(std::ostream& os, SRegisterList reglist) { in operator <<() argument 157 SRegister first = reglist.GetFirstSRegister(); in operator <<() 158 SRegister last = reglist.GetLastSRegister(); in operator <<() 167 std::ostream& operator<<(std::ostream& os, DRegisterList reglist) { in operator <<() argument 168 DRegister first = reglist.GetFirstDRegister(); in operator <<() 169 DRegister last = reglist.GetLastDRegister(); in operator <<()
|
/third_party/node/deps/v8/src/wasm/baseline/ |
H A D | liftoff-register.h | 516 inline std::ostream& operator<<(std::ostream& os, LiftoffRegList reglist) { in operator <<() argument 518 for (bool first = true; !reglist.is_empty(); first = false) { in operator <<() 519 LiftoffRegister reg = reglist.GetFirstRegSet(); in operator <<() 520 reglist.clear(reg); in operator <<()
|
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 2222 unsigned reglist = fieldFromInstruction(Insn, 0, 16); in DecodeMemMultipleWritebackInstruction() local 2300 if (!Check(S, DecodeRegListOperand(Inst, reglist, Address, Decoder))) in DecodeMemMultipleWritebackInstruction() 6078 unsigned reglist = (fieldFromInstruction(Insn, 1, 7) << 1) | in DecodeVSCCLRM() local 6081 if (!Check(S, DecodeDPRRegListOperand(Inst, reglist, Address, Decoder))) { in DecodeVSCCLRM() 6085 unsigned reglist = fieldFromInstruction(Insn, 0, 8) | in DecodeVSCCLRM() local 6088 if (!Check(S, DecodeSPRRegListOperand(Inst, reglist, Address, Decoder))) { in DecodeVSCCLRM()
|
Completed in 12 milliseconds