Searched refs:rd_hi (Results 1 - 5 of 5) sorted by relevance
/third_party/node/deps/v8/src/codegen/mips/ |
H A D | macro-assembler-mips.cc | 408 void TurboAssembler::Mul(Register rd_hi, Register rd_lo, Register rs, in CallRecordWriteStub() argument 414 mfhi(rd_hi); in CallRecordWriteStub() 417 DCHECK(rd_hi != rs); in CallRecordWriteStub() 418 DCHECK(rd_hi != rt.rm() && rd_lo != rt.rm()); in CallRecordWriteStub() 419 muh(rd_hi, rs, rt.rm()); in CallRecordWriteStub() 422 DCHECK(rd_hi != rt.rm() && rd_lo != rt.rm()); in CallRecordWriteStub() 424 muh(rd_hi, rs, rt.rm()); in CallRecordWriteStub() 436 mfhi(rd_hi); in CallRecordWriteStub() 439 DCHECK(rd_hi != rs); in CallRecordWriteStub() 440 DCHECK(rd_hi ! in CallRecordWriteStub() 452 Mulu(Register rd_hi, Register rd_lo, Register rs, const Operand& rt) CallRecordWriteStub() argument [all...] |
H A D | macro-assembler-mips.h | 422 void instr(Register rd_hi, Register rd_lo, Register rs, const Operand& rt); \ 423 void instr(Register rd_hi, Register rd_lo, Register rs, Register rt) { \ 424 instr(rd_hi, rd_lo, rs, Operand(rt)); \ 426 void instr(Register rd_hi, Register rd_lo, Register rs, int32_t j) { \ 427 instr(rd_hi, rd_lo, rs, Operand(j)); \
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/DartARM32/ |
H A D | assembler_arm.h | 516 void smull(Register rd_lo, Register rd_hi, Register rn, Register rm, 521 void umull(Register rd_lo, Register rd_hi, Register rn, Register rm, 524 void smlal(Register rd_lo, Register rd_hi, Register rn, Register rm, 526 void umlal(Register rd_lo, Register rd_hi, Register rn, Register rm, 532 void umaal(Register rd_lo, Register rd_hi, Register rn, Register rm);
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H A D | assembler_arm.cc | 394 void Assembler::smull(Register rd_lo, Register rd_hi, Register rn, Register rm, 396 // Assembler registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs. 397 EmitMulOp(cond, B23 | B22, rd_lo, rd_hi, rn, rm); 402 void Assembler::umull(Register rd_lo, Register rd_hi, 404 // Assembler registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs. 405 EmitMulOp(cond, B23, rd_lo, rd_hi, rn, rm); 409 void Assembler::umlal(Register rd_lo, Register rd_hi, Register rn, Register rm, 411 // Assembler registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs. 412 EmitMulOp(cond, B23 | B21, rd_lo, rd_hi, rn, rm); 415 void Assembler::umaal(Register rd_lo, Register rd_hi, Registe [all...] |
/third_party/node/deps/v8/src/execution/arm/ |
H A D | simulator-arm.cc | 2084 int rd_hi = rn; // Remap the rn field to the RdHi register. in DecodeType01() local 2103 set_register(rd_hi, hi_res); in DecodeType01()
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