/third_party/ltp/testcases/kernel/fs/fsx-linux/ |
H A D | fsx-linux.c | 151 prt(char *fmt, ...) in prt() function 168 prt("%s%s%s\n", prefix, prefix ? ": " : "", strerror(errno)); in prterr() 192 prt("LOG DUMP (%d total operations):\n", logcount); in logdump() 205 prt("%d: %lu.%06lu ", opnum, lp->tv.tv_sec, lp->tv.tv_usec); in logdump() 209 prt("MAPREAD 0x%x thru 0x%x (0x%x bytes)", in logdump() 214 prt("\t***RRRR***"); in logdump() 217 prt("MAPWRITE 0x%x thru 0x%x (0x%x bytes)", in logdump() 222 prt("\t******WWWW"); in logdump() 225 prt("READ 0x%x thru 0x%x (0x%x bytes)", in logdump() 230 prt("\ in logdump() [all...] |
/third_party/backends/backend/ |
H A D | umax_pp.c | 201 int ret, prt = 0, mdl; in umax_pp_attach() local 220 prt = strtol (devname + 2, NULL, 16); in umax_pp_attach() 222 prt = atoi (devname); in umax_pp_attach() 239 ret = sanei_umax_pp_attach (prt, name); in umax_pp_attach() 271 ret = sanei_umax_pp_model (prt, &mdl); in umax_pp_attach() 1062 int rc, prt = 0; in sane_open() local 1084 prt = strtol (devlist[0].port + 2, NULL, 16); in sane_open() 1086 prt = atoi (devlist[0].port); in sane_open() 1087 rc = sanei_umax_pp_open (prt, NULL); in sane_open() 1126 prt in sane_open() [all...] |
/third_party/python/Lib/idlelib/idle_test/ |
H A D | test_run.py | 401 cls.prt = Func() # Need reference. 402 run.print_exception = cls.prt 419 self.assertIs(self.prt.args[0], ZeroDivisionError)
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/third_party/mesa3d/src/amd/addrlib/src/r800/ |
H A D | siaddrlib.cpp | 1969 if (bpp == 128 || thickness > 1 || flags.fmask || flags.prt) in HwlSetupTileInfo() 1985 if (flags.prt) in HwlSetupTileInfo() 2259 pOut->prtTileIndex = flags.prt; in HwlSetupTileInfo() 2697 else if ((pIn->flags.prt == FALSE) && in HwlComputeSurfaceInfo() 3402 pInOut->flags.prt = TRUE; 3411 * Set prt tile modes. 3425 pInOut->flags.prt = TRUE; 3483 if (pInOut->flags.prt) 3583 if ((mipLevel == 0) && (flags.prt)) 3659 key.fields.prt [all...] |
H A D | ciaddrlib.cpp | 954 // First prt thick tile index in the tile mode table in HwlOptimizeTileMode() 1176 if (pInOut->flags.prt) in HwlSelectTileMode() 1869 if (flags.prt || IsPrtTileMode(tileMode)) in HwlComputeMacroModeIndex() 2083 (flags.prt == FALSE) && in HwlComputeSurfaceAlignmentsMacroTiled()
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/third_party/mesa3d/src/amd/addrlib/src/gfx9/ |
H A D | gfx9addrlib.cpp | 1753 // Clear out bits above the block size if prt's are enabled in GetPipeEquation() 1785 // if 1xaa and not prt, then xor in the z bits in GetPipeEquation() 2620 // For non-prt-xor, maybe need to initialize some more bits for xor 2772 // For non-prt-xor, maybe need to initialize some more bits for xor 3312 const BOOL_32 prt = flags.prt; 3339 if (prt && isNonPrtXor) 3358 if (((tex1d == FALSE) && prt) || zbuffer || msaa || (pIn->bpp == 0) || 3383 if (zbuffer || (prt && tex3d) || fmask || zMaxMip) 3406 if (prt || zbuffe [all...] |
/third_party/mesa3d/src/amd/addrlib/src/gfx11/ |
H A D | gfx11addrlib.cpp | 2226 const BOOL_32 prt = flags.prt; 2266 else if (prt && ((swizzleMask & Gfx11Rsrc2dPrtSwModeMask) == 0)) 2275 (prt && ((swizzleMask & Gfx11Rsrc3dPrtSwModeMask) == 0)) || 2504 allowedSwModeSet.value &= pIn->flags.prt ? Gfx11Rsrc2dPrtSwModeMask : Gfx11Rsrc2dSwModeMask; 2508 allowedSwModeSet.value &= pIn->flags.prt ? Gfx11Rsrc3dPrtSwModeMask : Gfx11Rsrc3dSwModeMask;
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/third_party/mesa3d/src/amd/addrlib/inc/ |
H A D | addrinterface.h | 153 UINT_32 prt : 1; ///< SI only, indicate whether this equation is for prt member 504 UINT_32 prt : 1; ///< Flag for partially resident texture member 631 ///< If address lib return true for mip 0, client should set prt flag 2243 * Compute prt surface related information 2401 UINT_32 prt : 1; ///< This is a partially resident texture member
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/third_party/mesa3d/src/amd/common/ |
H A D | ac_surface.c | 721 if (AddrSurfInfoIn->flags.prt) { in gfx6_compute_level() 1114 AddrSurfInfoIn.flags.prt = (surf->flags & RADEON_SURF_PRT) != 0; in gfx6_compute_surface() 1462 if (sin.flags.prt) { in gfx9_get_preferred_swizzle_mode() 1723 if (in->flags.prt) { in gfx9_compute_miptree() 2198 AddrSurfInfoIn.flags.prt = (surf->flags & RADEON_SURF_PRT) != 0; in gfx9_compute_surface()
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/third_party/mesa3d/src/amd/addrlib/src/gfx10/ |
H A D | gfx10addrlib.cpp | 2611 const BOOL_32 prt = flags.prt; 2655 else if ((prt && ((swizzleMask & Gfx10Rsrc2dPrtSwModeMask) == 0)) || 2665 (prt && ((swizzleMask & Gfx10Rsrc3dPrtSwModeMask) == 0)) || 2975 allowedSwModeSet.value &= pIn->flags.prt ? Gfx10Rsrc2dPrtSwModeMask : Gfx10Rsrc2dSwModeMask; 2979 allowedSwModeSet.value &= pIn->flags.prt ? Gfx10Rsrc3dPrtSwModeMask : Gfx10Rsrc3dSwModeMask;
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/third_party/mesa3d/src/amd/addrlib/src/core/ |
H A D | addrlib1.cpp | 3495 * Return TRUE if it is prt tile without rotation 3511 * Return TRUE if it is prt tile 3620 (pInOut->flags.prt == FALSE)) in OptimizeTileMode() 3947 * Compute prt surface related info
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