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Searched refs:num_cpu_mask_bits (Results 1 - 8 of 8) sorted by relevance

/third_party/mesa3d/src/util/
H A Du_cpu_detect.h128 unsigned num_cpu_mask_bits; member
H A Du_cpu_detect.c512 util_cpu_caps.num_cpu_mask_bits)) { in get_cpu_topology()
578 util_cpu_caps.num_cpu_mask_bits); in get_cpu_topology()
651 * used to properly set num_cpu_mask_bits below. On BSDs that don't have in util_cpu_detect_once()
676 util_cpu_caps.num_cpu_mask_bits = align(total_cpus, 32); in util_cpu_detect_once()
861 printf("util_cpu_caps.num_cpu_mask_bits = %u\n", util_cpu_caps.num_cpu_mask_bits); in util_cpu_detect_once()
H A Du_queue.c263 util_get_cpu_caps()->num_cpu_mask_bits); in util_queue_thread_func()
/third_party/mesa3d/src/mesa/main/
H A Dglthread.c217 NULL, util_get_cpu_caps()->num_cpu_mask_bits); in _mesa_glthread_flush_batch()
/third_party/mesa3d/src/gallium/winsys/amdgpu/drm/
H A Damdgpu_winsys.c345 NULL, util_get_cpu_caps()->num_cpu_mask_bits); in amdgpu_pin_threads_to_L3_cache()
/third_party/mesa3d/src/gallium/winsys/radeon/drm/
H A Dradeon_drm_winsys.c781 NULL, util_get_cpu_caps()->num_cpu_mask_bits); in radeon_pin_threads_to_L3_cache()
/third_party/mesa3d/src/gallium/auxiliary/util/
H A Du_threaded_context.c2984 NULL, util_get_cpu_caps()->num_cpu_mask_bits); in tc_set_context_param()
/third_party/mesa3d/src/gallium/drivers/zink/
H A Dzink_context.c252 NULL, util_get_cpu_caps()->num_cpu_mask_bits); in zink_set_context_param()

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