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Searched refs:num_banks (Results 1 - 11 of 11) sorted by relevance

/third_party/libdrm/radeon/
H A Dradeon_surface.c103 uint32_t num_banks; member
240 surf_man->hw_info.num_banks = 4; in r6_init_hw_info()
243 surf_man->hw_info.num_banks = 8; in r6_init_hw_info()
246 surf_man->hw_info.num_banks = 8; in r6_init_hw_info()
371 xalign = (surf_man->hw_info.group_bytes * surf_man->hw_info.num_banks) / in r6_surface_init_2d()
373 xalign = MAX2(tilew * surf_man->hw_info.num_banks, xalign); in r6_surface_init_2d()
383 surf_man->hw_info.num_banks * in r6_surface_init_2d()
525 surf_man->hw_info.num_banks = 4; in eg_init_hw_info()
528 surf_man->hw_info.num_banks = 8; in eg_init_hw_info()
531 surf_man->hw_info.num_banks in eg_init_hw_info()
1072 si_gb_tile_mode(uint32_t gb_tile_mode, unsigned *num_pipes, unsigned *num_banks, uint32_t *macro_tile_aspect, uint32_t *bank_w, uint32_t *bank_h, uint32_t *tile_split) si_gb_tile_mode() argument
1617 si_surface_init_2d(struct radeon_surface_manager *surf_man, struct radeon_surface *surf, struct radeon_surface_level *level, unsigned bpe, unsigned tile_mode, unsigned num_pipes, unsigned num_banks, unsigned tile_split, uint64_t offset, unsigned start_level) si_surface_init_2d() argument
1705 unsigned num_pipes, num_banks; si_surface_init_2d_miptrees() local
1857 cik_get_2d_params(struct radeon_surface_manager *surf_man, unsigned bpe, unsigned nsamples, bool is_color, unsigned tile_mode, uint32_t *num_pipes, uint32_t *tile_split_ptr, uint32_t *num_banks, uint32_t *macro_tile_aspect, uint32_t *bank_w, uint32_t *bank_h) cik_get_2d_params() argument
2214 cik_surface_init_2d(struct radeon_surface_manager *surf_man, struct radeon_surface *surf, struct radeon_surface_level *level, unsigned bpe, unsigned tile_mode, unsigned tile_split, unsigned num_pipes, unsigned num_banks, uint64_t offset, unsigned start_level) cik_surface_init_2d() argument
2308 uint32_t num_pipes, num_banks; cik_surface_init_2d_miptrees() local
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/third_party/mesa3d/src/amd/addrlib/src/chip/r800/
H A Dsi_gb_reg.h111 unsigned int num_banks : 2; member
121 unsigned int num_banks : 2; member
134 unsigned int num_banks : 2; member
149 unsigned int num_banks : 2; member
/third_party/mesa3d/src/amd/common/
H A Dac_surface.h120 unsigned num_banks : 5; /* max 16 */ member
H A Dac_surface.c918 surf->u.legacy.num_banks = csio->pTileInfo->banks; in gfx6_surface_settings()
1175 AddrTileInfoIn.banks = surf->u.legacy.num_banks; in gfx6_compute_surface()
2642 surf->u.legacy.num_banks = 2 << AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in ac_surface_set_bo_metadata()
2697 *tiling_flags |= AMDGPU_TILING_SET(NUM_BANKS, util_logbase2(surf->u.legacy.num_banks) - 1); in ac_surface_get_bo_metadata()
3086 surf->u.legacy.num_banks, surf->u.legacy.mtilea, in ac_surface_print_info()
/third_party/mesa3d/src/amd/vulkan/
H A Dradv_radeon_winsys.h149 unsigned num_banks; member
H A Dradv_image.c439 surface->u.legacy.num_banks = md->u.legacy.num_banks; in radv_patch_surface_from_metadata()
1400 metadata->u.legacy.num_banks = surface->u.legacy.num_banks; in radv_init_metadata()
/third_party/mesa3d/src/gallium/drivers/r600/
H A Dr600_texture.c288 metadata->u.legacy.num_banks = surface->u.legacy.num_banks; in r600_texture_init_metadata()
304 surf->u.legacy.num_banks = metadata->u.legacy.num_banks; in r600_surface_import_metadata()
837 rtex->surface.u.legacy.bankh, rtex->surface.u.legacy.num_banks, rtex->surface.u.legacy.mtilea, in r600_print_texture_info()
/third_party/mesa3d/src/gallium/include/winsys/
H A Dradeon_winsys.h227 unsigned num_banks; member
/third_party/mesa3d/src/amd/vulkan/winsys/amdgpu/
H A Dradv_amdgpu_bo.c917 tiling_flags |= AMDGPU_TILING_SET(NUM_BANKS, util_logbase2(md->u.legacy.num_banks) - 1); in radv_amdgpu_winsys_bo_set_metadata()
963 md->u.legacy.num_banks = 2 << AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in radv_amdgpu_winsys_bo_get_metadata()
/third_party/mesa3d/src/amd/addrlib/src/r800/
H A Dciaddrlib.cpp1747 pCfg->banks = 1 << (gbTileMode.f.num_banks + 1); in ReadGbMacroTileCfg()
H A Dsiaddrlib.cpp3083 pCfg->info.banks = 1 << (gbTileMode.f.num_banks + 1);

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