| /third_party/mesa3d/src/amd/common/ |
| H A D | ac_nir_cull.c | 105 nir_ssa_def *prim_outside_view = nir_imm_false(b); in cull_bbox()
114 nir_ssa_def *prim_is_small_else = nir_imm_false(b); in cull_bbox()
120 prim_is_small = nir_imm_false(b); in cull_bbox()
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| H A D | ac_nir_lower_ngg.c | 858 nir_store_var(b, gs_accepted_var, nir_bcsel(b, fully_culled, nir_imm_false(b), nir_has_input_primitive_amd(b)), 0x1u); in compact_vertices_after_culling()
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| /third_party/mesa3d/src/intel/compiler/ |
| H A D | brw_nir_lower_intersection_shader.c | 85 nir_store_deref(b, commit, nir_imm_false(b), 0x1); in lower_any_hit_for_intersection()
157 nir_store_var(b, commit, nir_imm_false(b), 0x1); in brw_nir_lower_intersection_shader()
199 nir_store_var(b, commit_tmp, nir_imm_false(b), 0x1); in brw_nir_lower_intersection_shader()
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| H A D | brw_nir_lower_rt_intrinsics.c | 36 return nir_imm_false(b); in build_leaf_is_procedural()
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| H A D | brw_nir_lower_ray_queries.c | 318 not_done_else = nir_imm_false(b); in lower_ray_query_intrinsic()
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| /third_party/mesa3d/src/compiler/spirv/ |
| H A D | vtn_cfg.c | 984 nir_store_var(&b->nb, switch_fall_var, nir_imm_false(&b->nb), 1); in vtn_emit_branch()
1027 nir_ssa_def *any = nir_imm_false(&b->nb); in vtn_switch_case_condition()
1038 nir_ssa_def *cond = nir_imm_false(&b->nb); in vtn_switch_case_condition()
1202 nir_store_var(&b->nb, do_cont, nir_imm_false(&b->nb), 1); in vtn_emit_cf_list_structured()
1235 nir_store_var(&b->nb, fall_var, nir_imm_false(&b->nb), 1); in vtn_emit_cf_list_structured()
1364 nir_ssa_def *cond = nir_imm_false(&b->nb); in vtn_emit_cf_func_unstructured()
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| /third_party/mesa3d/src/microsoft/compiler/ |
| H A D | dxil_nir_lower_int_samplers.c | 189 wrap_result_t result = {coords, nir_imm_false(b)}; in wrap_coords()
497 nir_ssa_def *use_border_color = nir_imm_false(b); in lower_sample_to_txf_for_integer_tex_impl()
516 params.wrap[i].use_border_color = nir_imm_false(b); in lower_sample_to_txf_for_integer_tex_impl()
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| /third_party/mesa3d/src/compiler/nir/ |
| H A D | nir_lower_discard_or_demote.c | 69 nir_ssa_def *zero = nir_imm_false(b); in nir_lower_demote_to_discard_instr()
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| H A D | nir_lower_returns.c | 212 nir_store_var(b, state->return_flag, nir_imm_false(b), 1); in lower_returns_in_block()
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| H A D | nir_lower_shader_calls.c | 663 nir_store_reg(&b, resume_reg, nir_imm_false(&b), 1); in duplicate_loop_bodies()
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| H A D | nir_builder.h | 221 nir_imm_false(nir_builder *build) in nir_imm_false() function
487 return nir_bany_inequal(b, src, nir_imm_false(b)); in nir_bany()
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| H A D | nir_deref.c | 1401 deref_is = nir_imm_false(b); in opt_known_deref_mode_is()
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| /third_party/mesa3d/src/amd/vulkan/ |
| H A D | radv_pipeline_rt.c | 670 nir_store_var(&b_shader, vars->ahit_accept, nir_imm_false(&b_shader), 0x1); in lower_rt_instructions()
901 nir_store_deref(b, commit, nir_imm_false(b), 0x1); in lower_any_hit_for_intersection()
978 nir_store_var(b, commit, nir_imm_false(b), 0x1); in nir_lower_intersection_shader()
997 nir_store_var(b, commit_tmp, nir_imm_false(b), 0x1); in nir_lower_intersection_shader()
1185 nir_store_var(b, vars->ahit_terminate, nir_imm_false(b), 0x1); in insert_traversal_triangle_case()
1287 nir_store_var(b, vars->ahit_accept, nir_imm_false(b), 0x1); in insert_traversal_aabb_case()
1288 nir_store_var(b, vars->ahit_terminate, nir_imm_false(b), 0x1); in insert_traversal_aabb_case()
1411 nir_store_var(&b, trav_vars.hit, nir_imm_false(&b), 1); in build_traversal_shader()
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| H A D | radv_query.c | 164 nir_store_var(&b, available, nir_imm_false(&b), 0x1); in build_occlusion_query_shader()
415 nir_store_var(&b, available, nir_imm_false(&b), 0x1); in build_tfb_query_shader()
535 nir_store_var(&b, available, nir_imm_false(&b), 0x1); in build_timestamp_query_shader()
649 nir_store_var(&b, available, nir_imm_false(&b), 0x1); in build_pg_query_shader()
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