Searched refs:next_instr (Results 1 - 8 of 8) sorted by relevance
/third_party/mesa3d/src/gallium/drivers/lima/ir/pp/ |
H A D | liveness.c | 213 ppir_instr *next_instr; in ppir_liveness_compute_live_sets() local 227 next_instr = list_first_entry(&succ->instr_list, ppir_instr, list); in ppir_liveness_compute_live_sets() 228 assert(next_instr); in ppir_liveness_compute_live_sets() 231 instr->live_set, next_instr->live_set, in ppir_liveness_compute_live_sets() 232 instr->live_mask, next_instr->live_mask); in ppir_liveness_compute_live_sets() 236 ppir_instr *next_instr = list_entry(instr->list.next, ppir_instr, list); in ppir_liveness_compute_live_sets() local 238 instr->live_set, next_instr->live_set, in ppir_liveness_compute_live_sets() 239 instr->live_mask, next_instr->live_mask); in ppir_liveness_compute_live_sets()
|
/third_party/python/Python/ |
H A D | ceval.c | 130 _Py_CODEUNIT *next_instr) in lltrace_instruction() 133 int oparg = _Py_OPARG(*next_instr); in lltrace_instruction() 134 int opcode = _Py_OPCODE(*next_instr); in lltrace_instruction() 137 int offset = (int)(next_instr - _PyCode_CODE(frame->f_code)); in lltrace_instruction() 1305 frame->prev_instr = next_instr++; \ 1311 #define INSTRUCTION_START(op) (frame->prev_instr = next_instr++) 1325 lltrace_instruction(frame, stack_pointer, next_instr); } 1343 opcode = _Py_OPCODE(*next_instr); \ 1367 #define INSTR_OFFSET() ((int)(next_instr - first_instr)) 1369 _Py_CODEUNIT word = *next_instr; \ 128 lltrace_instruction(_PyInterpreterFrame *frame, PyObject **stack_pointer, _Py_CODEUNIT *next_instr) lltrace_instruction() argument 1692 _Py_CODEUNIT *next_instr; global() local [all...] |
/third_party/mesa3d/src/freedreno/afuc/ |
H A D | asm.h | 63 struct asm_instruction *next_instr(int tok);
|
H A D | parser.y | 58 instr = next_instr(tok);
|
H A D | asm.c | 52 next_instr(int tok) in next_instr() function
|
/third_party/node/deps/v8/src/execution/ppc/ |
H A D | simulator-ppc.cc | 1553 Instruction* next_instr = bit_cast<Instruction*>(get_pc() + kInstrSize); in ExecuteGeneric() local 1554 uint16_t suffix_value = next_instr->Bits(15, 0); in ExecuteGeneric() 1556 switch (next_instr->OpcodeBase()) { in ExecuteGeneric() 1559 int rt = next_instr->RTValue(); in ExecuteGeneric() 1560 int ra = next_instr->RAValue(); in ExecuteGeneric() 1573 int ra = next_instr->RAValue(); in ExecuteGeneric() 1574 int rt = next_instr->RTValue(); in ExecuteGeneric() 1581 int ra = next_instr->RAValue(); in ExecuteGeneric() 1582 int rt = next_instr->RTValue(); in ExecuteGeneric() 1590 int ra = next_instr in ExecuteGeneric() [all...] |
/third_party/node/deps/v8/src/execution/riscv64/ |
H A D | simulator-riscv64.cc | 1459 Instruction* next_instr = reinterpret_cast<Instruction*>(cur + kInstrSize); in get_ebreak_code() local 1460 if (next_instr->BaseOpcodeFieldRaw() == RO_LUI) in get_ebreak_code() 1461 return (next_instr->Imm20UValue()); in get_ebreak_code()
|
/third_party/vixl/src/aarch64/ |
H A D | simulator-aarch64.cc | 6913 uint64_t next_instr = in Simulator() local 6915 if (!debugger_->IsBreakpoint(next_instr)) { in Simulator() 6916 debugger_->RegisterBreakpoint(next_instr); in Simulator()
|
Completed in 40 milliseconds