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Searched refs:movs (Results 1 - 25 of 44) sorted by relevance

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/third_party/mesa3d/src/gallium/drivers/vc4/
H A Dvc4_opt_copy_propagation.c65 try_copy_prop(struct vc4_compile *c, struct qinst *inst, struct qinst **movs) in try_copy_prop() argument
77 * SSA def. Alternatively, if it's in the "movs" array in try_copy_prop()
82 struct qinst *mov = movs[inst->src[i].index]; in try_copy_prop()
157 apply_kills(struct vc4_compile *c, struct qinst **movs, struct qinst *inst) in apply_kills() argument
163 if (movs[i] && in apply_kills()
164 (movs[i]->dst.index == inst->dst.index || in apply_kills()
165 (movs[i]->src[0].file == QFILE_TEMP && in apply_kills()
166 movs[i]->src[0].index == inst->dst.index))) { in apply_kills()
167 movs[i] = NULL; in apply_kills()
176 struct qinst **movs; in qir_opt_copy_propagation() local
[all...]
/third_party/mesa3d/src/broadcom/compiler/
H A Dvir_opt_copy_propagate.c119 try_copy_prop(struct v3d_compile *c, struct qinst *inst, struct qinst **movs) in try_copy_prop() argument
131 * SSA def. Alternatively, if it's in the "movs" array in try_copy_prop()
136 struct qinst *mov = movs[inst->src[i].index]; in try_copy_prop()
210 apply_kills(struct v3d_compile *c, struct qinst **movs, struct qinst *inst) in apply_kills() argument
216 if (movs[i] && in apply_kills()
217 (movs[i]->dst.index == inst->dst.index || in apply_kills()
218 (movs[i]->src[0].file == QFILE_TEMP && in apply_kills()
219 movs[i]->src[0].index == inst->dst.index))) { in apply_kills()
220 movs[i] = NULL; in apply_kills()
229 struct qinst **movs; in vir_opt_copy_propagate() local
[all...]
/third_party/mesa3d/src/intel/compiler/
H A Dbrw_fs_sel_peephole.cpp156 int movs = count_movs_from_if(devinfo, then_mov, else_mov, then_block, else_block); in opt_peephole_sel() local
158 if (movs == 0) in opt_peephole_sel()
162 for (int i = 0; i < movs; i++) { in opt_peephole_sel()
175 movs = i; in opt_peephole_sel()
181 movs = i; in opt_peephole_sel()
186 if (movs == 0) in opt_peephole_sel()
189 for (int i = 0; i < movs; i++) { in opt_peephole_sel()
/third_party/mesa3d/src/compiler/nir/tests/
H A Dload_store_vectorizer_tests.cpp83 std::map<unsigned, nir_alu_instr*> movs; member in __anon7314::nir_load_store_vectorize_test
254 movs[id] = mov; in create_indirect_load()
321 movs[id] = mov; in create_shared_load()
407 EXPECT_INSTR_SWIZZLES(movs[0x1], load, "x"); in TEST_F()
408 EXPECT_INSTR_SWIZZLES(movs[0x2], load, "y"); in TEST_F()
429 EXPECT_INSTR_SWIZZLES(movs[0x1], load, "xy"); in TEST_F()
430 EXPECT_INSTR_SWIZZLES(movs[0x2], load, "yz"); in TEST_F()
481 EXPECT_INSTR_SWIZZLES(movs[0x1], load, "x"); in TEST_F()
482 EXPECT_INSTR_SWIZZLES(movs[0x2], load, "x"); in TEST_F()
515 EXPECT_INSTR_SWIZZLES(movs[ in TEST_F()
[all...]
/third_party/vixl/benchmarks/aarch32/
H A Dasm-disasm-speed-test.cc206 __ movs(Narrow, r3, 0U); in Generate_1()
207 __ movs(Narrow, r5, 1U); in Generate_1()
209 __ movs(Narrow, r0, 4U); in Generate_1()
264 __ movs(Narrow, r3, 14U); in Generate_1()
372 __ movs(Narrow, r3, 1U); in Generate_2()
389 __ movs(Narrow, r1, 0U); in Generate_2()
490 __ movs(Narrow, r3, 1U); in Generate_3()
494 __ movs(Narrow, r1, 14U); in Generate_3()
508 __ movs(Narrow, r2, 1U); in Generate_3()
512 __ movs(Narro in Generate_3()
[all...]
/third_party/musl/porting/liteos_m/kernel/src/string/arch/arm/
H A Dmemcpy_le.S86 movs r12, r3, lsl #31
118 movs r12, r3, lsl #28
191 movs r12, r2, lsl #28
198 movs r12, r2, lsl #30
247 movs r5, r5, lsl #31
385 movs r5, lr, lsl #(31-3)
398 movs r2, r2, lsl #31 /* copy remaining 0, 1, 2 or 3 bytes */
/third_party/musl/porting/uniproton/kernel/src/string/arch/arm/
H A Dmemcpy_le.S82 movs r12, r3, lsl #31
114 movs r12, r3, lsl #28
187 movs r12, r2, lsl #28
194 movs r12, r2, lsl #30
243 movs r5, r5, lsl #31
381 movs r5, lr, lsl #(31-3)
394 movs r2, r2, lsl #31 /* copy remaining 0, 1, 2 or 3 bytes */
/third_party/musl/src/string/arm/
H A Dmemcpy.S77 movs r12, r3, lsl #31
106 movs r12, r3, lsl #28
176 movs r12, r2, lsl #28
181 movs r12, r2, lsl #30
227 movs r5, r5, lsl #31
447 movs r5, lr, lsl #(31-3)
467 movs r2, r2, lsl #31 /* copy remaining 0, 1, 2 or 3 bytes */
H A D__aeabi_memset.s20 movs r2, #0
/third_party/optimized-routines/string/arm/
H A Dstrcmp-armv6m.S87 movs r0, #1
91 movs r0, #0
/third_party/musl/src/setjmp/arm/
H A Dlongjmp.S9 movs r0,r1
/third_party/ffmpeg/libavcodec/arm/
H A Dmlpdsp_armv5te.S411 movs ST2, ST0, lsl #29 // shift is in range 0-15; we want to special-case 0 and 8
417 30: movs ST2, ST0, lsl #29 // shift is in range 0-15; we want to special-case 0 and 8
602 movs INDEX, v3, lsl #7
H A Dsimple_idct_armv5te.S333 movs \dst, \src
/third_party/ffmpeg/libswresample/x86/
H A Dresample.asm216 movs%4 [dstq], xm0
318 movs%4 xm4, [%5]
371 movs%4 xm4, [%5]
515 movs%4 [dstq], xm0
/third_party/vixl/test/aarch32/
H A Dtest-assembler-cond-rd-operand-rn-t32.cc55 M(movs) \
339 #include "aarch32/traces/assembler-cond-rd-operand-rn-movs-t32.h"
H A Dtest-assembler-cond-rd-operand-rn-shift-rs-narrow-out-it-block-t32.cc51 #define FOREACH_INSTRUCTION(M) M(movs)
355 #include "aarch32/traces/assembler-cond-rd-operand-rn-shift-rs-narrow-out-it-block-movs-t32.h"
H A Dtest-assembler-cond-rd-operand-const-cannot-use-pc-a32.cc53 M(movs) \
1381 #include "aarch32/traces/assembler-cond-rd-operand-const-cannot-use-pc-movs-a32.h"
H A Dtest-assembler-cond-rd-operand-const-t32.cc55 M(movs) \
2347 #include "aarch32/traces/assembler-cond-rd-operand-const-movs-t32.h"
H A Dtest-assembler-cond-rd-operand-rn-shift-amount-1to32-a32.cc55 M(movs) \
786 #include "aarch32/traces/assembler-cond-rd-operand-rn-shift-amount-1to32-movs-a32.h"
H A Dtest-assembler-cond-rd-operand-rn-shift-amount-1to32-t32.cc55 M(movs) \
814 #include "aarch32/traces/assembler-cond-rd-operand-rn-shift-amount-1to32-movs-t32.h"
/third_party/ffmpeg/libavcodec/x86/
H A Dme_cmp.asm292 .next2lines: ; FIXME why are these unaligned movs? pix1[] is aligned
/third_party/vixl/src/aarch32/
H A Dassembler-aarch32.h2653 void movs(Condition cond,
2657 void movs(Register rd, const Operand& operand) { in movs() function in vixl::aarch32::Assembler
2658 movs(al, Best, rd, operand); in movs()
2660 void movs(Condition cond, Register rd, const Operand& operand) { in movs() function in vixl::aarch32::Assembler
2661 movs(cond, Best, rd, operand); in movs()
2663 void movs(EncodingSize size, Register rd, const Operand& operand) { in movs() function in vixl::aarch32::Assembler
2664 movs(al, size, rd, operand); in movs()
/third_party/skia/src/core/
H A DSkVM.cpp2475 void Assembler::movs(X dst, V src, int lane) {
3979 a->movs(GP0, dst(), 0);
4122 a->movs(GP1, r(x), i); // Extract index lane i into GP1.
4134 a->movs(GP1, r(x), i);
4146 a->movs(GP1, r(x), i);
/third_party/ffmpeg/libavutil/x86/
H A Dtx_float.asm331 ; reorder the multiplies to save movs reg, reg in the %if above
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/DartARM32/
H A Dassembler_arm.h488 void movs(Register rd, Operand o, Condition cond = AL);

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