Home
last modified time | relevance | path

Searched refs:mip_levels (Results 1 - 25 of 37) sorted by relevance

12

/third_party/mesa3d/src/freedreno/fdl/
H A Dfd_layout_test.c43 int mip_levels = 1; in fdl_test_layout() local
44 while (max_size > 1 && testcase->layout.slices[mip_levels].pitch) { in fdl_test_layout()
45 mip_levels++; in fdl_test_layout()
53 MAX2(testcase->layout.depth0, 1), mip_levels, in fdl_test_layout()
60 MAX2(testcase->layout.depth0, 1), mip_levels, in fdl_test_layout()
70 for (int l = 1; l < mip_levels; l++) in fdl_test_layout()
75 for (int l = 0; l < mip_levels; l++) { in fdl_test_layout()
H A Dfd6_layout.c106 uint32_t depth0, uint32_t mip_levels, uint32_t array_size, in fdl6_layout()
116 layout->mip_levels = mip_levels; in fdl6_layout()
178 if (mip_levels > 1) { in fdl6_layout()
195 for (uint32_t level = 0; level < mip_levels; level++) { in fdl6_layout()
214 if (level == mip_levels - 1) in fdl6_layout()
282 for (uint32_t level = 0; level < mip_levels; level++) in fdl6_layout()
104 fdl6_layout(struct fdl_layout *layout, enum pipe_format format, uint32_t nr_samples, uint32_t width0, uint32_t height0, uint32_t depth0, uint32_t mip_levels, uint32_t array_size, bool is_3d, struct fdl_explicit_layout *explicit_layout) fdl6_layout() argument
H A Dfd5_layout.c35 uint32_t depth0, uint32_t mip_levels, uint32_t array_size, in fdl5_layout()
63 for (uint32_t level = 0; level < mip_levels; level++) { in fdl5_layout()
81 if (level == mip_levels - 1) in fdl5_layout()
33 fdl5_layout(struct fdl_layout *layout, enum pipe_format format, uint32_t nr_samples, uint32_t width0, uint32_t height0, uint32_t depth0, uint32_t mip_levels, uint32_t array_size, bool is_3d) fdl5_layout() argument
H A Dfreedreno_layout.h127 uint32_t mip_levels; member
238 uint32_t depth0, uint32_t mip_levels, uint32_t array_size,
243 uint32_t depth0, uint32_t mip_levels, uint32_t array_size,
H A Dfd6_view.c320 A6XX_TEX_CONST_3_MIN_LAYERSZ(layout->slices[layout->mip_levels - 1].size0); in fdl6_view_init()
401 tile_mode == TILE6_LINEAR && args->base_miplevel != layout->mip_levels - 1; in fdl6_view_init()
/third_party/mesa3d/src/imagination/vulkan/
H A Dpvr_image.c67 if (image->vk.mip_levels > 1 || in pvr_image_init_physical_extent()
92 const uint32_t level_alignment = image->vk.mip_levels > 1 ? 4 : 1; in pvr_image_setup_mip_levels()
94 assert(image->vk.mip_levels <= ARRAY_SIZE(image->mip_levels)); in pvr_image_setup_mip_levels()
98 for (uint32_t i = 0; i < image->vk.mip_levels; i++) { in pvr_image_setup_mip_levels()
102 struct pvr_mip_level *mip_level = &image->mip_levels[i]; in pvr_image_setup_mip_levels()
243 &image->mip_levels[subresource->mipLevel]; in pvr_GetImageSubresourceLayout()
245 pvr_assert(subresource->mipLevel < image->vk.mip_levels); in pvr_GetImageSubresourceLayout()
281 info.mip_levels = iview->vk.level_count; in pvr_CreateImageView()
287 image->mip_levels[inf in pvr_CreateImageView()
[all...]
H A Dpvr_tex_state.c141 word1.num_mip_levels = info->mip_levels; in pvr_pack_tex_state()
166 word1.num_mip_levels = info->mip_levels; in pvr_pack_tex_state()
H A Dpvr_tex_state.h73 uint32_t mip_levels; member
78 * on the mip levels that are being used i.e. mip_levels.
/third_party/mesa3d/src/gallium/winsys/svga/drm/
H A Dvmw_screen_dri.c150 uint32_t mip_levels; in vmw_drm_gb_surface_from_handle() local
164 &mip_levels, &handle, &desc.region); in vmw_drm_gb_surface_from_handle()
173 if (mip_levels != 1) { in vmw_drm_gb_surface_from_handle()
176 whandle->handle, mip_levels); in vmw_drm_gb_surface_from_handle()
280 if (rep->mip_levels[0] != 1) { in vmw_drm_surface_from_handle()
283 handle, rep->mip_levels[0]); in vmw_drm_surface_from_handle()
288 if (rep->mip_levels[i] != 0) { in vmw_drm_surface_from_handle()
313 rep->mip_levels[0], in vmw_drm_surface_from_handle()
H A Dvmwgfx_drm.h192 * @mip_levels: Number of mip levels for each face.
209 __u32 mip_levels[DRM_VMW_MAX_SURFACE_FACES]; member
940 __u32 mip_levels; member
H A Dvmw_screen_ioctl.c170 req->mip_levels[iFace] = numMipLevels; in vmw_ioctl_surface_create()
182 req->mip_levels[iFace] = 0; in vmw_ioctl_surface_create()
257 req->base.mip_levels = numMipLevels; in vmw_ioctl_gb_surface_create()
296 req->mip_levels = numMipLevels; in vmw_ioctl_gb_surface_create()
451 *numMipLevels = rep->creq.base.mip_levels; in vmw_ioctl_gb_surface_ref()
478 *numMipLevels = rep->creq.mip_levels; in vmw_ioctl_gb_surface_ref()
/third_party/vk-gl-cts/external/amber/src/src/vulkan/
H A Dtransfer_image.cc77 uint32_t mip_levels, in TransferImage()
91 mip_levels_(mip_levels), in TransferImage()
98 image_info_.mipLevels = mip_levels; in TransferImage()
69 TransferImage(Device* device, const Format& format, VkImageAspectFlags aspect, VkImageType image_type, VkImageUsageFlags image_usage_flags, uint32_t x, uint32_t y, uint32_t z, uint32_t mip_levels, uint32_t base_mip_level, uint32_t used_mip_levels, uint32_t samples) TransferImage() argument
H A Dtransfer_image.h40 uint32_t mip_levels,
/third_party/mesa3d/src/vulkan/runtime/
H A Dvk_image.h41 uint32_t mip_levels; member
125 image->mip_levels - range->baseMipLevel : range->levelCount; in vk_image_subresource_level_count()
H A Dvk_image.c81 image->mip_levels = pCreateInfo->mipLevels; in vk_image_init()
457 assert(range->baseMipLevel < image->mip_levels); in vk_image_view_init()
482 <= image->mip_levels); in vk_image_view_init()
/third_party/vk-gl-cts/external/amber/src/src/
H A Dbuffer.h210 void SetMipLevels(uint32_t mip_levels) { mip_levels_ = mip_levels; } in SetMipLevels() argument
/third_party/libdrm/include/drm/
H A Dvmwgfx_drm.h168 * @mip_levels: Number of mip levels for each face.
185 __u32 mip_levels[DRM_VMW_MAX_SURFACE_FACES]; member
931 __u32 mip_levels; member
/third_party/mesa3d/src/gallium/drivers/d3d12/
H A Dd3d12_resource.h50 unsigned mip_levels; member
H A Dd3d12_resource_state.cpp505 level + (layer * res->mip_levels) + plane * (res->mip_levels * res->base.b.array_size); in d3d12_transition_subresources_state()
H A Dd3d12_context.cpp847 desc.Texture1D.MipLevels = sampler_view->mip_levels; in d3d12_init_sampler_view_descriptor()
852 desc.Texture1DArray.MipLevels = sampler_view->mip_levels; in d3d12_init_sampler_view_descriptor()
863 desc.Texture2D.MipLevels = sampler_view->mip_levels; in d3d12_init_sampler_view_descriptor()
874 desc.Texture2DArray.MipLevels = sampler_view->mip_levels; in d3d12_init_sampler_view_descriptor()
890 desc.Texture3D.MipLevels = sampler_view->mip_levels; in d3d12_init_sampler_view_descriptor()
899 desc.TextureCube.MipLevels = sampler_view->mip_levels; in d3d12_init_sampler_view_descriptor()
905 desc.TextureCubeArray.MipLevels = sampler_view->mip_levels; in d3d12_init_sampler_view_descriptor()
937 sampler_view->mip_levels = state->u.tex.last_level - state->u.tex.first_level + 1; in d3d12_create_sampler_view()
H A Dd3d12_context.h124 unsigned mip_levels; member
/third_party/mesa3d/src/broadcom/vulkan/
H A Dv3dv_image.c107 assert(image->vk.mip_levels >= 1); in v3d_setup_slices()
110 for (int32_t i = image->vk.mip_levels - 1; i >= 0; i--) { in v3d_setup_slices()
217 for (int i = 0; i < image->vk.mip_levels; i++) in v3d_setup_slices()
/third_party/mesa3d/src/intel/vulkan/
H A Danv_image.c663 for (uint32_t l = 0; l < image->vk.mip_levels; l++) in add_aux_state_tracking_buffer()
666 state_size += image->vk.mip_levels * image->vk.array_layers * 4; in add_aux_state_tracking_buffer()
739 if (image->vk.mip_levels > 1) { in add_aux_surface_if_supported()
901 .levels = image->vk.mip_levels, in add_shadow_surface()
945 .levels = image->vk.mip_levels, in add_primary_surface()
1161 assert(image->vk.mip_levels == 1); in check_drm_format_mod()
/third_party/mesa3d/src/panfrost/vulkan/
H A Dpanvk_image.c87 .nr_slices = image->vk.mip_levels, in panvk_image_create()
/third_party/mesa3d/src/freedreno/vulkan/
H A Dtu_autotune.c147 APPEND_TO_HASH(&hash_state, cmd->state.attachments[i]->image->vk.mip_levels); in hash_renderpass_instance()

Completed in 24 milliseconds

12