| /third_party/ffmpeg/libavfilter/x86/ |
| H A D | vf_lut3d.asm | 176 minps m5, m5, m13 ; min lut max
181 minps m4, m4, m13 ; clamp n idex
200 minps m%1, m%1, m13
294 minps next_r, next_r, m13 ; clamp lutmax
297 minps next_g, next_g, m13 ; clamp lutmax
300 minps next_b, next_b, m13 ; clamp lutmax
365 minps m7, d_r, d_g
368 minps x2, m7, d_b
372 minps x1, m8, m7
452 minps
[all...] |
| H A D | vf_blend.asm | 279 minps m0, m3
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| H A D | vf_gblur.asm | 823 minps m3, m2
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| /third_party/ffmpeg/libavcodec/x86/ |
| H A D | audiodsp.asm | 150 minps m2, m1
151 minps m3, m1
152 minps m4, m1
153 minps m5, m1
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| H A D | aacencdsp.asm | 79 minps m2, m3
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| /third_party/node/deps/v8/src/codegen/x64/ |
| H A D | sse-instr.h | 26 V(minps, 0F, 5D) \
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| /third_party/skia/third_party/externals/swiftshader/src/Reactor/ |
| H A D | x86.hpp | 34 RValue<Float4> minps(RValue<Float4> x, RValue<Float4> y);
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| H A D | LLVMReactor.cpp | 3173 return x86::minps(x, y); in Min()
3749 RValue<Float4> minps(RValue<Float4> x, RValue<Float4> y) in minps() function
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| /third_party/ffmpeg/libavresample/x86/ |
| H A D | audio_convert.asm | 212 minps m0, m0, m5
213 minps m1, m1, m5
214 minps m2, m2, m5
215 minps m3, m3, m5
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| /third_party/node/deps/v8/src/codegen/shared-ia32-x64/ |
| H A D | macro-assembler-shared-ia32-x64.cc | 178 // The minps instruction doesn't propagate NaNs and +0's in its first in F32x4Min()
179 // operand. Perform minps in both orders, merge the results, and adjust. in F32x4Min()
187 minps(scratch, dst); in F32x4Min()
188 minps(dst, src); in F32x4Min()
191 minps(scratch, rhs); in F32x4Min()
193 minps(dst, lhs); in F32x4Min()
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| H A D | macro-assembler-shared-ia32-x64.h | 256 AVX_OP(Minps, minps)
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| H A D | IceAssemblerX8632.h | 573 void minps(Type Ty, XmmRegister dst, const AsmAddress &src);
574 void minps(Type Ty, XmmRegister dst, XmmRegister src);
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| H A D | IceAssemblerX8664.h | 592 void minps(Type Ty, XmmRegister dst, const AsmAddress &src);
593 void minps(Type Ty, XmmRegister dst, XmmRegister src);
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| H A D | IceAssemblerX8632.cpp | 1147 void AssemblerX8632::minps(Type Ty, XmmRegister dst, XmmRegister src) { in minps() function in Ice::X8632::AssemblerX8632
1156 void AssemblerX8632::minps(Type Ty, XmmRegister dst, const AsmAddress &src) { in minps() function in Ice::X8632::AssemblerX8632
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| H A D | IceAssemblerX8664.cpp | 1228 void AssemblerX8664::minps(Type Ty, XmmRegister dst, XmmRegister src) { in minps() function in Ice::X8664::AssemblerX8664
1238 void AssemblerX8664::minps(Type Ty, XmmRegister dst, const AsmAddress &src) { in minps() function in Ice::X8664::AssemblerX8664
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| H A D | IceInstX8632.h | 3576 &Assembler::minps, &Assembler::minps};
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| H A D | IceInstX8664.h | 3473 &Assembler::minps, &Assembler::minps};
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
| H A D | XmmArith.cpp | 561 (0.55, 0.43, 0.23, 1.21), minps, float); \ in TEST_F()
564 TestMinMaxPS(64, Dst, (1.0, -1000.0), Src, (0.55, 1.21), minps, double); \ in TEST_F()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
| H A D | XmmArith.cpp | 563 (0.55, 0.43, 0.23, 1.21), minps, float); \ in TEST_F()
566 TestMinMaxPS(64, Dst, (1.0, -1000.0), Src, (0.55, 1.21), minps, double); \ in TEST_F()
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| /third_party/ffmpeg/libswscale/x86/ |
| H A D | input.asm | 753 minps m%1, m8 ; +inf -> 65535
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| /third_party/ffmpeg/libavutil/x86/ |
| H A D | x86inc.asm | 1387 AVX_INSTR minps, sse, 1, 0, 1
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| /third_party/mesa3d/src/mesa/x86/ |
| H A D | assyntax.h | 1668 #define MINPS(a, b) minps P_ARG2(a, b)
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| /third_party/node/deps/v8/src/compiler/backend/x64/ |
| H A D | code-generator-x64.cc | 2990 ASSEMBLE_SIMD_BINOP(minps); in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/wasm/baseline/ia32/ |
| H A D | liftoff-assembler-ia32.h | 4005 // Due to the way minps works, pmin(a, b) = minps(b, a).
4006 liftoff::EmitSimdNonCommutativeBinOp<&Assembler::vminps, &Assembler::minps>(
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| /third_party/node/deps/v8/src/wasm/baseline/x64/ |
| H A D | liftoff-assembler-x64.h | 3568 // Due to the way minps works, pmin(a, b) = minps(b, a). in emit_f32x4_pmin()
3569 liftoff::EmitSimdNonCommutativeBinOp<&Assembler::vminps, &Assembler::minps>( in emit_f32x4_pmin()
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