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Searched refs:meta_alignment_log2 (Results 1 - 8 of 8) sorted by relevance

/third_party/mesa3d/src/amd/common/
H A Dac_surface.c756 surf->meta_alignment_log2 = MAX2(surf->meta_alignment_log2, util_logbase2(AddrDccOut->dccRamBaseAlign)); in gfx6_compute_level()
834 surf->meta_alignment_log2 = util_logbase2(AddrHtileOut->baseAlign); in gfx6_compute_level()
1228 surf->meta_alignment_log2 = 0; in gfx6_compute_surface()
1376 surf->meta_size = align64(surf->surf_size >> 8, (1 << surf->meta_alignment_log2) * 4); in gfx6_compute_surface()
1390 surf->meta_size = align(surf->meta_size, 1 << surf->meta_alignment_log2); in gfx6_compute_surface()
1830 surf->meta_alignment_log2 = util_logbase2(hout.baseAlign); in gfx9_compute_miptree()
1935 surf->meta_alignment_log2 = util_logbase2(dout.dccRamBaseAlign); in gfx9_compute_miptree()
1983 surf->u.gfx9.color.display_dcc_alignment_log2 = surf->meta_alignment_log2; in gfx9_compute_miptree()
2543 surf->meta_offset = align64(surf->total_size, 1 << surf->meta_alignment_log2); in ac_compute_surface()
[all...]
H A Dac_surface.h354 uint8_t meta_alignment_log2; /* DCC or HTILE */ member
/third_party/mesa3d/src/gallium/winsys/radeon/drm/
H A Dradeon_drm_surface.c341 surf->meta_alignment_log2 = util_logbase2(base_align); in si_compute_htile()
438 surf_ws->meta_offset = align64(surf_ws->total_size, 1 << surf_ws->meta_alignment_log2); in radeon_winsys_surface_init()
/third_party/mesa3d/src/gallium/drivers/r600/
H A Dr600_texture.c800 rtex->surface.meta_alignment_log2 = util_logbase2(base_align); in r600_texture_get_htile_size()
814 rtex->htile_offset = align(rtex->size, 1 << rtex->surface.meta_alignment_log2); in r600_texture_allocate_htile()
858 1 << rtex->surface.meta_alignment_log2); in r600_print_texture_info()
/third_party/mesa3d/src/amd/vulkan/
H A Dradv_image.c802 dcc_tile_swizzle &= (1 << plane->surface.meta_alignment_log2) - 1; in si_set_mutable_tex_desc_fields()
H A Dradv_device.c6338 dcc_tile_swizzle &= ((1 << surf->meta_alignment_log2) - 1) >> 8; in radv_initialise_color_surface()
/third_party/mesa3d/src/gallium/drivers/radeonsi/
H A Dsi_descriptors.c331 dcc_tile_swizzle &= (1 << tex->surface.meta_alignment_log2) - 1; in si_set_mutable_tex_desc_fields()
H A Dsi_state.c3284 dcc_tile_swizzle &= ((1 << tex->surface.meta_alignment_log2) - 1) >> 8; in si_emit_framebuffer_state()

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