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Searched refs:ldrh (Results 1 - 25 of 43) sorted by relevance

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/third_party/ffmpeg/libavutil/arm/
H A Dasm.S291 A ldrh \rt, [\rn, \rm]!
293 T ldrh \rt, [\rn]
297 A ldrh \rt, [\rn, -\rm]!
299 T ldrh \rt, [\rn]
303 A ldrh \rt, [\rn], \rm
304 T ldrh \rt, [\rn]
/third_party/node/deps/openssl/openssl/crypto/modes/asm/
H A Dghash-armv4.pl213 ldrh $Tll,[sp,$nhi] @ rem_4bit[rem]
236 ldrh $Tll,[sp,$nlo] @ rem_4bit[rem]
257 ldrh $Tlh,[sp,$nhi]
317 ldrh $Tll,[$rem_4bit,$nhi] @ rem_4bit[rem]
338 ldrh $Tll,[$rem_4bit,$nlo] @ rem_4bit[rem]
355 ldrh $Tll,[$rem_4bit,$nhi] @ rem_4bit[rem]
/third_party/openssl/crypto/modes/asm/
H A Dghash-armv4.pl213 ldrh $Tll,[sp,$nhi] @ rem_4bit[rem]
236 ldrh $Tll,[sp,$nlo] @ rem_4bit[rem]
257 ldrh $Tlh,[sp,$nhi]
317 ldrh $Tll,[$rem_4bit,$nhi] @ rem_4bit[rem]
338 ldrh $Tll,[$rem_4bit,$nlo] @ rem_4bit[rem]
355 ldrh $Tll,[$rem_4bit,$nhi] @ rem_4bit[rem]
/third_party/ffmpeg/libavcodec/arm/
H A Dmdct_vfp.S101 ldrh J0, [REVTAB], #2
102 ldrh J1, [REVTAB], #2
104 ldrh J3, [REVTAB_HI, #-2]!
105 ldrh J2, [REVTAB_HI, #-2]!
H A Dac3dsp_arm.S28 ldrh r12, [r0, r3]
H A Dsimple_idct_armv5te.S427 ldrh ip, [lr]
/third_party/node/deps/openssl/config/archs/linux-armv4/asm/crypto/modes/
H A Dghash-armv4.S69 ldrh r8,[sp,r14] @ rem_4bit[rem]
92 ldrh r8,[sp,r12] @ rem_4bit[rem]
113 ldrh r9,[sp,r14]
230 ldrh r8,[r2,r14] @ rem_4bit[rem]
251 ldrh r8,[r2,r12] @ rem_4bit[rem]
268 ldrh r8,[r2,r14] @ rem_4bit[rem]
/third_party/node/deps/openssl/config/archs/linux-armv4/asm_avx2/crypto/modes/
H A Dghash-armv4.S69 ldrh r8,[sp,r14] @ rem_4bit[rem]
92 ldrh r8,[sp,r12] @ rem_4bit[rem]
113 ldrh r9,[sp,r14]
230 ldrh r8,[r2,r14] @ rem_4bit[rem]
251 ldrh r8,[r2,r12] @ rem_4bit[rem]
268 ldrh r8,[r2,r14] @ rem_4bit[rem]
/third_party/lzma/Asm/arm64/
H A DLzmaDecOpt.S71 ldrh \dest, [\mem]
74 ldrh \dest, [\mem, \offset]!
77 ldrh \dest, [\mem1, \mem2]
80 ldrh \dest, [\mem1, \mem2, lsl #PSHIFT]
1090 ldrh sym, [t0_R, cnt_R]
1097 ldrh sym, [t0_R, cnt_R]
1103 ldrh sym, [t0_R, cnt_R]
/third_party/node/deps/v8/src/baseline/arm/
H A Dbaseline-assembler-arm-inl.h169 __ ldrh(type, FieldMemOperand(map, Map::kInstanceTypeOffset)); in JumpIfObjectType()
182 __ ldrh(type, FieldMemOperand(map, Map::kInstanceTypeOffset)); in JumpIfInstanceType()
377 __ ldrh(output, FieldMemOperand(source, offset)); in LoadWord16FieldZeroExtend()
/third_party/vixl/test/aarch64/
H A Dtest-disasm-aarch64.cc1153 COMPARE(ldrh(w0, MemOperand(x1, w2, UXTW)), "ldrh w0, [x1, w2, uxtw]"); in TEST()
1154 COMPARE(ldrh(w3, MemOperand(x4, w5, UXTW, 1)), "ldrh w3, [x4, w5, uxtw #1]"); in TEST()
1155 COMPARE(ldrh(w6, MemOperand(x7, x8)), "ldrh w6, [x7, x8]"); in TEST()
1156 COMPARE(ldrh(w9, MemOperand(x10, x11, LSL, 1)), in TEST()
1157 "ldrh w9, [x10, x11, lsl #1]"); in TEST()
1158 COMPARE(ldrh(w12, MemOperand(x13, w14, SXTW)), "ldrh w1 in TEST()
[all...]
H A Dtest-trace-aarch64.cc190 __ ldrh(w5, MemOperand(x0)); in GenerateTestSequenceBase()
191 __ ldrh(w5, MemOperand(x1, 2, PostIndex)); in GenerateTestSequenceBase()
192 __ ldrh(w5, MemOperand(x1, 2, PreIndex)); in GenerateTestSequenceBase()
193 __ ldrh(x6, MemOperand(x0)); in GenerateTestSequenceBase()
194 __ ldrh(x6, MemOperand(x1, 2, PostIndex)); in GenerateTestSequenceBase()
195 __ ldrh(x6, MemOperand(x1, 2, PreIndex)); in GenerateTestSequenceBase()
/third_party/optimized-routines/string/aarch64/
H A Dstrcpy-mte.S124 ldrh dataw1, [srcin]
/third_party/node/deps/v8/src/regexp/arm/
H A Dregexp-macro-assembler-arm.cc402 __ ldrh(r3, MemOperand(r0, char_size(), PostIndex)); in CheckNotBackReference()
403 __ ldrh(r4, MemOperand(r2, char_size(), PostIndex)); in CheckNotBackReference()
1308 // The ldr, str, ldrh, strh instructions can do unaligned accesses, if the CPU
1320 __ ldrh(current_character(), MemOperand(end_of_input_address(), offset));
1331 __ ldrh(current_character(), MemOperand(end_of_input_address(), offset));
/third_party/optimized-routines/string/arm/
H A Dstrcmp.S401 ldrh data2, [src2]
/third_party/node/deps/v8/src/builtins/arm/
H A Dbuiltins-arm.cc434 __ ldrh(r3, in Generate_ResumeGeneratorTrampoline()
469 __ ldrh(r0, FieldMemOperand( in Generate_ResumeGeneratorTrampoline()
1270 __ ldrh(r4, FieldMemOperand(r4, Map::kInstanceTypeOffset)); in Generate_InterpreterEntryTrampoline()
1430 __ ldrh(r8, FieldMemOperand(r8, Map::kInstanceTypeOffset)); in Generate_InterpreterEntryTrampoline()
2089 __ ldrh(r6, FieldMemOperand(scratch, Map::kInstanceTypeOffset)); in Generate_CallOrConstructVarargs()
2307 __ ldrh(r2, in Generate_CallFunction()
3309 __ ldrh(temp1, MemOperand(src, 2, PostIndex), cs); in Generate_MemCopyUint8Uint8()
/third_party/vixl/src/aarch32/
H A Dassembler-aarch32.h2491 void ldrh(Condition cond,
2495 void ldrh(Register rt, const MemOperand& operand) { in ldrh() function in vixl::aarch32::Assembler
2496 ldrh(al, Best, rt, operand); in ldrh()
2498 void ldrh(Condition cond, Register rt, const MemOperand& operand) { in ldrh() function in vixl::aarch32::Assembler
2499 ldrh(cond, Best, rt, operand); in ldrh()
2501 void ldrh(EncodingSize size, Register rt, const MemOperand& operand) { in ldrh() function in vixl::aarch32::Assembler
2502 ldrh(al, size, rt, operand); in ldrh()
2505 void ldrh(Condition cond, Register rt, Location* location);
2510 void ldrh(Register rt, Location* location) { ldrh(a function in vixl::aarch32::Assembler
[all...]
H A Dmacro-assembler-aarch32.cc1678 ldrh(rt, MemOperandComputationHelper(cond, scratch, location, mask)); in Delegate()
H A Ddisasm-aarch32.cc1793 void Disassembler::ldrh(Condition cond, in ldrh() function in vixl::aarch32::Disassembler
1802 void Disassembler::ldrh(Condition cond, Register rt, Location* location) { in ldrh() function in vixl::aarch32::Disassembler
7854 ldrh(CurrentCond(), in DecodeT32()
7969 ldrh(CurrentCond(), in DecodeT32()
16897 ldrh(CurrentCond(), in DecodeT32()
16902 ldrh(CurrentCond(), in DecodeT32()
17150 ldrh(CurrentCond(), in DecodeT32()
17159 ldrh(CurrentCond(), in DecodeT32()
17192 ldrh(CurrentCond(), in DecodeT32()
17233 ldrh(CurrentCon in DecodeT32()
[all...]
/third_party/node/deps/v8/src/codegen/arm/
H A Dmacro-assembler-arm.cc1762 ldrh(expected_reg, in CallRecordWriteStub()
1828 ldrh(type_reg, FieldMemOperand(map, Map::kInstanceTypeOffset)); in CallRecordWriteStub()
1850 ldrh(type_reg, FieldMemOperand(map, Map::kInstanceTypeOffset)); in CallRecordWriteStub()
H A Dassembler-arm.h604 void ldrh(Register dst, const MemOperand& src, Condition cond = al);
/third_party/skia/src/core/
H A DSkVM.h352 void ldrh(X dst, X src, int imm12=0); // 16-bit dst = *(src+imm12*2)
360 void ldrh(V dst, X src, int imm12=0); // 16-bit dst = *(src+imm12*2)
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/DartARM32/
H A Dassembler_arm.cc482 void Assembler::ldrh(Register rd, Address ad, Condition cond) {
1900 ldrh(result, FieldAddress(object, class_id_offset), cond);
2722 ldrh(reg, Address(base, offset), cond);
H A Dassembler_arm.h553 void ldrh(Register rd, Address ad, Condition cond = AL);
/third_party/ffmpeg/libavcodec/aarch64/
H A Dvp9itxfm_16bpp_neon.S1160 ldrh w1, [x12], #2
1909 ldrh w1, [x12], #2

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