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Searched refs:isUInt (Results 1 - 25 of 94) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZMCCodeEmitter.cpp188 assert(isUInt<4>(Base) && isUInt<12>(Disp)); in getBDAddr12Encoding()
198 assert(isUInt<4>(Base) && isInt<20>(Disp)); in getBDAddr20Encoding()
209 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<4>(Index)); in getBDXAddr12Encoding()
220 assert(isUInt<4>(Base) && isInt<20>(Disp) && isUInt<4>(Index)); in getBDXAddr20Encoding()
232 assert(isUInt<4>(Base) && isUInt<1 in getBDLAddr12Len4Encoding()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/
H A DX86AsmParserCommon.h18 (isUInt<16>(Value) && isInt<8>(static_cast<int16_t>(Value))); in isImmSExti16i8Value()
23 (isUInt<32>(Value) && isInt<8>(static_cast<int32_t>(Value))); in isImmSExti32i8Value()
35 return isUInt<8>(Value) || isInt<8>(Value); in isImmUnsignedi8Value()
39 return isUInt<4>(Value); in isImmUnsignedi4Value()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp310 bool isU1Imm() const { return Kind == Immediate && isUInt<1>(getImm()); } in isU1Imm()
311 bool isU2Imm() const { return Kind == Immediate && isUInt<2>(getImm()); } in isU2Imm()
312 bool isU3Imm() const { return Kind == Immediate && isUInt<3>(getImm()); } in isU3Imm()
313 bool isU4Imm() const { return Kind == Immediate && isUInt<4>(getImm()); } in isU4Imm()
314 bool isU5Imm() const { return Kind == Immediate && isUInt<5>(getImm()); } in isU5Imm()
316 bool isU6Imm() const { return Kind == Immediate && isUInt<6>(getImm()); } in isU6Imm()
318 isUInt<6>(getImm()) && in isU6ImmX2()
320 bool isU7Imm() const { return Kind == Immediate && isUInt<7>(getImm()); } in isU7Imm()
322 isUInt<7>(getImm()) && in isU7ImmX4()
324 bool isU8Imm() const { return Kind == Immediate && isUInt< in isU7ImmX4()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
H A DARCFrameLowering.cpp65 if (isUInt<6>(AbsAmount)) in generateStackAdjustment()
139 if (isUInt<6>(VarArgsBytes)) in emitPrologue()
188 TII->get(isUInt<6>(MFI.getStackSize()) ? ARC::ADD_rru6 in emitPrologue()
256 if (isUInt<6>(StackSize)) in emitEpilogue()
284 if (isUInt<6>(MoveAmount)) in emitEpilogue()
299 if (isUInt<6>(4 * StackSlotsUsedByFunclet)) in emitEpilogue()
326 if (isUInt<6>(VarArgsBytes)) in emitEpilogue()
457 if (isUInt<6>(NumBytes)) in emitRegUpdate()
H A DARCRegisterInfo.cpp74 unsigned AddOpc = isUInt<6>(Offset) ? ARC::ADD_rru6 : ARC::ADD_rrlimm; in ReplaceFrameIndex()
115 TII.get(isUInt<6>(Offset) ? ARC::ADD_rru6 : ARC::ADD_rrlimm)) in ReplaceFrameIndex()
H A DARCExpandPseudos.cpp64 isUInt<6>(SI.getOperand(2).getImm()) ? ARC::ADD_rru6 : ARC::ADD_rrlimm; in ExpandStore()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/Disassembler/
H A DRISCVDisassembler.cpp172 assert(isUInt<N>(Imm) && "Invalid immediate"); in decodeUImmOperand()
190 assert(isUInt<N>(Imm) && "Invalid immediate"); in decodeSImmOperand()
210 assert(isUInt<N>(Imm) && "Invalid immediate"); in decodeSImmOperandAndLsl1()
221 assert(isUInt<6>(Imm) && "Invalid immediate"); in decodeCLUIImmOperand()
232 assert(isUInt<3>(Imm) && "Invalid immediate"); in decodeFRMArg()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/include/llvm/Support/
H A DMathExtras.h288 /// isUInt - Checks if an unsigned integer fits into the given bit width.
294 /// to keep MSVC from (incorrectly) warning on isUInt<64> that we're shifting
298 isUInt(uint64_t X) {
299 static_assert(N > 0, "isUInt<0> doesn't make sense");
304 isUInt(uint64_t X) { in isUInt() function
309 template <> constexpr inline bool isUInt<8>(uint64_t x) { in isUInt() function
312 template <> constexpr inline bool isUInt<16>(uint64_t x) { in isUInt() function
315 template <> constexpr inline bool isUInt<32>(uint64_t x) { in isUInt() function
328 return isUInt<N + S>(x) && (x % (UINT64_C(1) << S) == 0); in isShiftedUInt()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
H A DAArch64CompressJumpTables.cpp128 if (isUInt<8>(Span / 4)) { in compressJumpTable()
133 } else if (isUInt<16>(Span / 4)) { in compressJumpTable()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.cpp735 return 0 <= Id && isUInt<ID_WIDTH_>(Id); in isValidHwreg()
739 return 0 <= Offset && isUInt<OFFSET_WIDTH_>(Offset); in isValidHwregOffset()
743 return 0 <= (Width - 1) && isUInt<WIDTH_M1_WIDTH_>(Width - 1); in isValidHwregWidth()
789 return 0 <= MsgId && isUInt<ID_WIDTH_>(MsgId); in isValidMsgId()
812 return 0 <= OpId && isUInt<OP_WIDTH_>(OpId); in isValidMsgOp()
835 return 0 <= StreamId && isUInt<STREAM_ID_WIDTH_>(StreamId); in isValidMsgStream()
1208 if (isInt<16>(Literal) || isUInt<16>(Literal)) {
1259 isUInt<20>(EncodedOffset) : isUInt<8>(EncodedOffset);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
H A DSystemZTargetTransformInfo.cpp53 if (isUInt<32>(Imm.getZExtValue())) in getIntImmCost()
104 if (isUInt<32>(Imm.getZExtValue())) in getIntImmCostInst()
112 if (isUInt<32>(Imm.getZExtValue())) in getIntImmCostInst()
115 if (isUInt<32>(-Imm.getSExtValue())) in getIntImmCostInst()
130 if (isUInt<32>(Imm.getZExtValue())) in getIntImmCostInst()
143 if (isUInt<32>(~Imm.getZExtValue())) in getIntImmCostInst()
205 if (isUInt<32>(Imm.getZExtValue())) in getIntImmCostIntrin()
207 if (isUInt<32>(-Imm.getSExtValue())) in getIntImmCostIntrin()
979 if (isUInt<16>(CI->getZExtValue())) in isFoldableLoad()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
H A DMathExtras.h364 /// to keep MSVC from (incorrectly) warning on isUInt<64> that we're shifting
368 isUInt(uint64_t X) {
369 static_assert(N > 0, "isUInt<0> doesn't make sense");
374 isUInt(uint64_t X) { in isUInt() function
379 template <> constexpr inline bool isUInt<8>(uint64_t x) { in isUInt() function
382 template <> constexpr inline bool isUInt<16>(uint64_t x) { in isUInt() function
385 template <> constexpr inline bool isUInt<32>(uint64_t x) { in isUInt() function
398 return isUInt<N + S>(x) && (x % (UINT64_C(1) << S) == 0); in isShiftedUInt()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.cpp522 Ok = isUInt<4>(Imm); in verifyInstruction()
525 Ok = isUInt<5>(Imm); in verifyInstruction()
528 Ok = isUInt<12>(Imm); in verifyInstruction()
537 Ok = isUInt<20>(Imm); in verifyInstruction()
544 Ok = isUInt<6>(Imm); in verifyInstruction()
546 Ok = isUInt<5>(Imm); in verifyInstruction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/AsmParser/
H A DRISCVAsmParser.cpp402 (isRV64() || (isInt<32>(Imm) || isUInt<32>(Imm))); in isImmXLenLI()
413 return (isRV64() && isUInt<6>(Imm)) || isUInt<5>(Imm); in isUImmLog2XLen()
426 return (isRV64() && isUInt<6>(Imm)) || isUInt<5>(Imm); in isUImmLog2XLenNonZero()
435 return IsConstantImm && isUInt<5>(Imm) && VK == RISCVMCExpr::VK_RISCV_None; in isUImm5()
444 return IsConstantImm && isUInt<5>(Imm) && (Imm != 0) && in isUImm5NonZero()
475 (isUInt<5>(Imm) || (Imm >= 0xfffe0 && Imm <= 0xfffff)) && in isCLUIImm()
574 return isUInt<20>(Imm) && (VK == RISCVMCExpr::VK_RISCV_None || in isUImm20LUI()
594 return isUInt<2 in isUImm20AUIPC()
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/IR/
H A DDataLayout.cpp226 if (!isUInt<24>(AddrSpace)) in getAddrSpace()
275 if (!isUInt<24>(AddrSpace)) in parseSpecifier()
353 if (!isUInt<16>(ABIAlign)) in parseSpecifier()
365 if (!isUInt<16>(PrefAlign)) in parseSpecifier()
492 if (!isUInt<24>(bit_width))
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
H A DAVRRegisterInfo.cpp182 if (isUInt<6>(Offset)) { in eliminateFrameIndex()
244 assert(isUInt<6>(Offset) && "Offset is out of range"); in eliminateFrameIndex()
H A DAVRFrameLowering.cpp129 unsigned Opcode = (isUInt<6>(FrameSize)) ? AVR::SBIWRdK : AVR::SUBIWRdK; in emitPrologue()
200 if (isUInt<6>(FrameSize)) { in emitEpilogue()
393 if (isUInt<6>(Amount)) { in eliminateCallFramePseudoInstr()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/Disassembler/
H A DSystemZDisassembler.cpp172 if (!isUInt<N>(Imm))
180 if (!isUInt<N>(Imm))
251 assert(isUInt<N>(Imm) && "Invalid PC-relative offset");
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp326 bool isOffset() const { return isImmTy(ImmTyOffset) && isUInt<16>(getImm()); } in isOffset()
327 bool isOffset0() const { return isImmTy(ImmTyOffset0) && isUInt<8>(getImm()); } in isOffset0()
328 bool isOffset1() const { return isImmTy(ImmTyOffset1) && isUInt<8>(getImm()); } in isOffset1()
339 bool isFORMAT() const { return isImmTy(ImmTyFORMAT) && isUInt<8>(getImm()); } in isFORMAT()
2161 if (!isUInt<32>(RegLo) || !isUInt<32>(RegHi) || RegLo > RegHi) in ParseRegRange()
3745 if (!isUInt<ENTRY##_WIDTH>(VALUE)) \ in ParseDirectiveAMDHSAKernel()
3750 if (!isUInt<sizeof(KD.group_segment_fixed_size) * CHAR_BIT>(Val)) in ParseDirectiveAMDHSAKernel()
3754 if (!isUInt<sizeof(KD.private_segment_fixed_size) * CHAR_BIT>(Val)) in ParseDirectiveAMDHSAKernel()
3839 if (!isUInt< in ParseDirectiveAMDHSAKernel()
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
H A DSILoadStoreOptimizer.cpp775 isUInt<8>(EltOffset0 / 64) && isUInt<8>(EltOffset1 / 64)) { in offsetsCanBeCombined()
783 if (isUInt<8>(EltOffset0) && isUInt<8>(EltOffset1)) { in offsetsCanBeCombined()
793 if ((OffsetDiff % 64 == 0) && isUInt<8>(OffsetDiff / 64)) { in offsetsCanBeCombined()
800 if (isUInt<8>(OffsetDiff)) { in offsetsCanBeCombined()
977 assert((isUInt<8>(NewOffset0) && isUInt<8>(NewOffset1)) && in mergeRead2Pair()
1075 assert((isUInt<8>(NewOffset0) && isUInt< in mergeWrite2Pair()
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H A DAMDGPUISelDAGToDAG.cpp1172 if ((OffsetBits == 16 && !isUInt<16>(Offset)) || in isDSOffsetLegal()
1173 (OffsetBits == 8 && !isUInt<8>(Offset))) in isDSOffsetLegal()
1202 if (isUInt<16>(ByteOffset)) { in SelectDS1Addr1Offset()
1241 if (isUInt<16>(CAddr->getZExtValue())) { in SelectDS1Addr1Offset()
1282 if (isUInt<8>(DWordOffset0)) { in SelectDS64Bit4ByteAligned()
1318 if (isUInt<8>(DWordOffset0) && isUInt<8>(DWordOffset1)) { in SelectDS64Bit4ByteAligned()
1368 if (isUInt<32>(C1->getZExtValue())) in SelectMUBUF()
1781 if (!isUInt<32>(EncodedOffset) || !isUInt<3 in SelectSMRDOffset()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ADT/
H A DPointerEmbeddedInt.h64 assert((std::is_signed<IntT>::value ? isInt<Bits>(I) : isUInt<Bits>(I)) &&
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
H A DHexagonNewValueJump.cpp263 Valid = (isUInt<5>(v) || v == -1); in canCompareBeNewValueJump()
267 Valid = isUInt<5>(v); in canCompareBeNewValueJump()
H A DHexagonInstrInfo.cpp2710 return isUInt<10>(Offset); in isValidOffset()
2715 return isUInt<6>(Offset); in isValidOffset()
2802 return isUInt<6>(Offset); in isValidOffset()
3325 ((isUInt<5>(MI.getOperand(2).getImm())) || in getCompoundCandidateGroup()
3400 if (!isUInt<5>(V)) in getCompoundOpcode()
3760 MI.getOperand(2).isImm() && isUInt<4>(MI.getOperand(2).getImm())) in getDuplexCandidateGroup()
3789 isUInt<3>(MI.getOperand(2).getImm())) in getDuplexCandidateGroup()
3873 MI.getOperand(1).isImm() && isUInt<4>(MI.getOperand(1).getImm())) in getDuplexCandidateGroup()
3909 MI.getOperand(2).isImm() && isUInt<1>(MI.getOperand(2).getImm())) in getDuplexCandidateGroup()
3916 MI.getOperand(1).isImm() && isUInt< in getDuplexCandidateGroup()
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/Disassembler/
H A DPPCDisassembler.cpp181 assert(isUInt<N>(Imm) && "Invalid immediate");
189 assert(isUInt<N>(Imm) && "Invalid immediate");

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