/third_party/node/deps/v8/src/codegen/mips/ |
H A D | assembler-mips-inl.h | 123 Instr instr1 = Assembler::instr_at(pc + 0 * kInstrSize); in set_target_internal_reference_encoded_at() local 125 DCHECK(Assembler::IsLui(instr1)); in set_target_internal_reference_encoded_at() 127 instr1 &= ~kImm16Mask; in set_target_internal_reference_encoded_at() 136 Assembler::instr_at_put(pc + 0 * kInstrSize, instr1 | lui_offset_u); in set_target_internal_reference_encoded_at() 140 PatchLuiOriImmediate(pc, imm, instr1, 0 * kInstrSize, instr2, in set_target_internal_reference_encoded_at() 217 Instr instr1 = Assembler::instr_at(pc_ + 0 * kInstrSize); in target_internal_reference() local 219 DCHECK(Assembler::IsLui(instr1)); in target_internal_reference() 223 Assembler::CreateTargetAddress(instr1, instr2)); in target_internal_reference() 225 return static_cast<Address>(Assembler::GetLuiOriImmediate(instr1, instr2)); in target_internal_reference() 268 Instr instr1 in relative_code_target_object_handle_at() local [all...] |
H A D | assembler-mips.cc | 859 Instr instr1 = instr_at(pos + 0 * kInstrSize); in target_at() local 864 imm = CreateTargetAddress(instr1, instr2); in target_at() 866 imm = GetLuiOriImmediate(instr1, instr2); in target_at() 982 Instr instr1 = instr_at(pos + 0 * kInstrSize); in target_at_put() local 987 DCHECK(IsLui(instr1) && (IsJicOrJialc(instr2) || IsOri(instr2))); in target_at_put() 988 instr1 &= ~kImm16Mask; in target_at_put() 994 instr_at_put(pos + 0 * kInstrSize, instr1 | lui_offset_u); in target_at_put() 997 PatchLuiOriImmediate(pos, imm, instr1, 0 * kInstrSize, instr2, in target_at_put() 3469 Instr instr1 = instr_at(pc + 0 * kInstrSize); in RelocateInternalReference() local 3474 imm = CreateTargetAddress(instr1, instr in RelocateInternalReference() 3510 Instr instr1 = instr_at(pc + 0 * kInstrSize); RelocateRelativeReference() local 3706 Instr instr1 = instr_at(pc); target_address_at() local 3742 Instr instr1 = instr_at(pc); set_target_value_at() local [all...] |
H A D | assembler-mips.h | 1553 static int32_t GetLuiOriImmediate(Instr instr1, Instr instr2); 1797 static void PatchLuiOriImmediate(Address pc, int32_t imm, Instr instr1, 1800 void PatchLuiOriImmediate(int pc, int32_t imm, Instr instr1,
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/third_party/node/deps/v8/src/codegen/ppc/ |
H A D | assembler-ppc-inl.h | 278 Instr instr1 = instr_at(pc); in target_address_at() local 281 if (IsLis(instr1) && IsOri(instr2)) { in target_address_at() 286 uint64_t hi = (static_cast<uint32_t>((instr1 & kImm16Mask) << 16) | in target_address_at() 293 return static_cast<Address>(((instr1 & kImm16Mask) << 16) | in target_address_at() 392 Instr instr1 = instr_at(pc); in PatchConstantPoolAccessInstruction() local 394 instr1 &= ~kImm16Mask; in PatchConstantPoolAccessInstruction() 395 instr1 |= (hi_word & kImm16Mask); in PatchConstantPoolAccessInstruction() 398 instr_at_put(pc, instr1); in PatchConstantPoolAccessInstruction() 455 Instr instr1 = instr_at(pc); in set_target_address_at() local 458 if (IsLis(instr1) in set_target_address_at() [all...] |
H A D | assembler-ppc.cc | 338 bool Assembler::Is64BitLoadIntoR12(Instr instr1, Instr instr2, Instr instr3, in Is64BitLoadIntoR12() argument 346 return (((instr1 >> 16) == 0x3D80) && ((instr2 >> 16) == 0x618C) && in Is64BitLoadIntoR12() 352 bool Assembler::Is32BitLoadIntoR12(Instr instr1, Instr instr2) { in Is32BitLoadIntoR12() argument 356 return (((instr1 >> 16) == 0x3D80) && ((instr2 >> 16) == 0x618C)); in Is32BitLoadIntoR12()
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H A D | assembler-ppc.h | 1267 static bool Is64BitLoadIntoR12(Instr instr1, Instr instr2, Instr instr3, 1270 static bool Is32BitLoadIntoR12(Instr instr1, Instr instr2);
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/third_party/mesa3d/src/compiler/nir/ |
H A D | nir_opt_vectorize.c | 115 const nir_instr *instr1 = (nir_instr *) data1; in instrs_equal() local 117 assert(instr1->type == nir_instr_type_alu); in instrs_equal() 120 nir_alu_instr *alu1 = nir_instr_as_alu(instr1); in instrs_equal() 130 if (!alu_srcs_equal(&alu1->src[i], &alu2->src[i], instr1->pass_flags)) in instrs_equal() 184 * the same instructions into one vectorized instruction. Note that instr1 188 instr_try_combine(struct set *instr_set, nir_instr *instr1, nir_instr *instr2) in instr_try_combine() argument 190 assert(instr1->type == nir_instr_type_alu); in instr_try_combine() 192 nir_alu_instr *alu1 = nir_instr_as_alu(instr1); in instr_try_combine() 200 assert(instr1->pass_flags == instr2->pass_flags); in instr_try_combine() 201 if (total_components > instr1 in instr_try_combine() [all...] |
H A D | nir_instr_set.c | 551 nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2) in nir_instrs_equal() argument 553 assert(instr_can_rewrite(instr1) && instr_can_rewrite(instr2)); in nir_instrs_equal() 555 if (instr1->type != instr2->type) in nir_instrs_equal() 558 switch (instr1->type) { in nir_instrs_equal() 560 nir_alu_instr *alu1 = nir_instr_as_alu(instr1); in nir_instrs_equal() 603 nir_deref_instr *deref1 = nir_instr_as_deref(instr1); in nir_instrs_equal() 649 nir_tex_instr *tex1 = nir_instr_as_tex(instr1); in nir_instrs_equal() 682 nir_load_const_instr *load1 = nir_instr_as_load_const(instr1); in nir_instrs_equal() 704 nir_phi_instr *phi1 = nir_instr_as_phi(instr1); in nir_instrs_equal() 724 nir_intrinsic_instr *intrinsic1 = nir_instr_as_intrinsic(instr1); in nir_instrs_equal() [all...] |
H A D | nir.h | 4161 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
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/third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
H A D | sfn_nir_vectorize_vs_inputs.c | 97 r600_io_access_same_var(const nir_instr *instr1, const nir_instr *instr2) in r600_io_access_same_var() argument 99 assert(instr1->type == nir_instr_type_intrinsic && in r600_io_access_same_var() 102 nir_intrinsic_instr *intr1 = nir_instr_as_intrinsic(instr1); in r600_io_access_same_var() 220 const nir_instr *instr1 = *(nir_instr **)util_dynarray_begin(arr1); in r600_cmp_func() local 223 return r600_io_access_same_var(instr1, instr2); in r600_cmp_func()
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/third_party/node/deps/v8/src/codegen/riscv64/ |
H A D | assembler-riscv64-inl.h | 242 Instr instr1 = Assembler::instr_at(pc); in relative_code_target_object_handle_at() local 244 DCHECK(IsAuipc(instr1)); in relative_code_target_object_handle_at() 246 int32_t code_target_index = BrachlongOffset(instr1, instr2); in relative_code_target_object_handle_at()
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H A D | assembler-riscv64.cc | 3614 Instr instr1 = instr_at(pc + 1 * kInstrSize); in RelocateRelativeReference() local 3616 if (IsAuipc(instr) && IsJalr(instr1)) { in RelocateRelativeReference() 3618 imm = BrachlongOffset(instr, instr1); in RelocateRelativeReference() 3620 PatchBranchlongOffset(pc, instr, instr1, imm); in RelocateRelativeReference() 3812 Instr instr1 = instr_at(pc + 1 * kInstrSize); in set_target_address_at() local 3814 int num = PatchBranchlongOffset(pc, instr, instr1, (int32_t)imm); in set_target_address_at() 3845 Instruction* instr1 = Instruction::At((unsigned char*)(pc + 1 * kInstrSize)); in target_address_at() local 3854 IsAddi(*reinterpret_cast<Instr*>(instr1)) && in target_address_at() 3861 (int64_t)instr1->Imm12Value(); in target_address_at() 3891 Instruction* instr1 in set_target_value_at() local [all...] |
/third_party/node/deps/v8/src/codegen/loong64/ |
H A D | assembler-loong64.cc | 365 Instr instr1 = in IsMov() local 367 return instr == instr1; in IsMov() 372 Instr instr1 = PCADDI | (si20 & 0xfffff) << kRjShift | rd.code(); in IsPcAddi() local 373 return instr == instr1; in IsPcAddi() 380 Instr instr1 = in IsNop() local 383 return instr == instr1; in IsNop() 2283 Instr instr1 = instr_at(pc + 1 * kInstrSize); in target_address_at() local 2288 DCHECK((IsLu12i_w(instr0) && (IsOri(instr1)) && (IsLu32i_d(instr2)))); in target_address_at() 2293 uint64_t low12 = ((uint64_t)(instr1 >> 10) & 0xfff); in target_address_at() 2319 Instr instr1 in set_target_value_at() local [all...] |
/third_party/node/deps/v8/src/codegen/s390/ |
H A D | assembler-s390.cc | 446 bool Assembler::Is64BitLoadIntoIP(SixByteInstr instr1, SixByteInstr instr2) { in Is64BitLoadIntoIP() argument 448 return (((instr1 >> 32) == 0xC0C8) && ((instr2 >> 32) == 0xC0C9)); in Is64BitLoadIntoIP()
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H A D | assembler-s390.h | 1340 static bool Is64BitLoadIntoIP(SixByteInstr instr1, SixByteInstr instr2);
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/third_party/node/deps/v8/src/compiler/backend/arm/ |
H A D | code-generator-arm.cc | 386 #define ASSEMBLE_ATOMIC64_ARITH_BINOP(instr1, instr2) \ 393 __ instr1(i.TempRegister(1), r2, i.InputRegister(0), SBit::SetCC); \ 3476 #define ATOMIC_ARITH_BINOP_CASE(op, instr1, instr2) \ in AssembleArchInstruction() 3479 ASSEMBLE_ATOMIC64_ARITH_BINOP(instr1, instr2); \ in AssembleArchInstruction() 3485 #define ATOMIC_LOGIC_BINOP_CASE(op, instr1) \ in AssembleArchInstruction() 3488 ASSEMBLE_ATOMIC64_LOGIC_BINOP(instr1); \ in AssembleArchInstruction()
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/third_party/node/deps/v8/src/compiler/backend/ia32/ |
H A D | code-generator-ia32.cc | 453 #define ASSEMBLE_I64ATOMIC_BINOP(instr1, instr2) \ 463 __ instr1(ebx, eax); \ 3642 #define ATOMIC_BINOP_CASE(op, instr1, instr2) \ in AssembleArchInstruction() 3645 ASSEMBLE_I64ATOMIC_BINOP(instr1, instr2) \ in AssembleArchInstruction()
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/third_party/node/deps/v8/src/codegen/mips64/ |
H A D | assembler-mips64.cc | 3916 Instr instr1 = instr_at(pc + 1 * kInstrSize); in target_address_at() local 3921 if ((GetOpcodeField(instr0) == LUI) && (GetOpcodeField(instr1) == ORI) && in target_address_at() 3926 ((uint64_t)(GetImmediate16(instr1)) << 16) | in target_address_at() 3956 Instr instr1 = instr_at(pc + kInstrSize); in set_target_value_at() local 3957 uint32_t rt_code = GetRt(instr1); in set_target_value_at() 3964 DCHECK((GetOpcodeField(instr0) == LUI && GetOpcodeField(instr1) == ORI && in set_target_value_at()
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