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/third_party/skia/third_party/externals/dawn/src/tests/white_box/
H A DD3D12DescriptorHeapTests.cpp28 // Pooling tests are required to advance the GPU completed serial to reuse heaps.
124 // Verify the shader visible view heaps switch over within a single submit.
132 // view bindgroup each draw. After HEAP_SIZE + 1 draws, the heaps must switch over. in TEST_P()
171 // Verify the shader visible sampler heaps does not switch over within a single submit.
176 // sampler bindgroup each draw. After HEAP_SIZE + 1 draws, the heaps WILL NOT switch over in TEST_P()
223 // Verify shader-visible heaps can be recycled for multiple submits.
225 // Use small heaps to count only pool-allocated switches. in TEST_P()
232 std::list<ComPtr<ID3D12DescriptorHeap>> heaps = {allocator->GetShaderVisibleHeap()}; in TEST_P() local
236 // Allocate + increment internal serials up to |kFrameDepth| and ensure heaps are always unique. in TEST_P()
240 EXPECT_TRUE(std::find(heaps in TEST_P()
277 std::set<ComPtr<ID3D12DescriptorHeap>> heaps = {allocator->GetShaderVisibleHeap()}; TEST_P() local
308 std::set<ComPtr<ID3D12DescriptorHeap>> heaps = {allocator->GetShaderVisibleHeap()}; TEST_P() local
350 std::set<ComPtr<ID3D12DescriptorHeap>> heaps = {allocator->GetShaderVisibleHeap()}; TEST_P() local
376 std::set<ComPtr<ID3D12DescriptorHeap>> heaps = {allocator->GetShaderVisibleHeap()}; TEST_P() local
401 std::set<ComPtr<ID3D12DescriptorHeap>> heaps = {allocator->GetShaderVisibleHeap()}; TEST_P() local
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/third_party/mesa3d/src/gallium/drivers/d3d12/
H A Dd3d12_descriptor_pool.cpp41 list_head heaps; member
206 list_inithead(&pool->heaps); in d3d12_descriptor_pool_new()
214 list_for_each_entry_safe(struct d3d12_descriptor_heap, heap, &pool->heaps, link) { in d3d12_descriptor_pool_free()
227 list_for_each_entry(struct d3d12_descriptor_heap, heap, &pool->heaps, link) { in d3d12_descriptor_pool_alloc_handle()
239 list_addtail(&valid_heap->link, &pool->heaps); in d3d12_descriptor_pool_alloc_handle()
H A Dd3d12_batch.cpp163 ID3D12DescriptorHeap* heaps[2] = { d3d12_descriptor_heap_get(batch->view_heap), in d3d12_start_batch() local
185 ctx->cmdlist->SetDescriptorHeaps(2, heaps); in d3d12_start_batch()
/third_party/skia/third_party/externals/dawn/src/tests/unittests/
H A DBuddyMemoryAllocatorTests.cpp97 // Verify that multiple allocation are created in separate heaps.
143 // Verify multiple sub-allocations can re-use heaps.
145 // After two 64 byte allocations with 128 byte heaps. in TEST()
195 // Verify resource sub-allocation of various sizes over multiple heaps.
383 // Verify resource heaps will be reused from a pool.
392 std::set<ResourceHeapBase*> heaps = {}; in TEST() local
401 heaps.insert(allocation.GetResourceHeap()); in TEST()
412 ASSERT_EQ(poolAllocator.GetPoolSizeForTesting(), heaps.size()); in TEST()
414 // Allocate again reusing the same heaps. in TEST()
418 ASSERT_FALSE(heaps in TEST()
433 std::set<ResourceHeapBase*> heaps = {}; TEST() local
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/third_party/mesa3d/src/imagination/vulkan/winsys/pvrsrvkm/
H A Dpvr_srv.c203 /* Check for and initialise required heaps. */ in pvr_srv_memctx_init()
246 /* Check for and set up optional heaps. */ in pvr_srv_memctx_init()
545 struct pvr_winsys_heaps *heaps) in pvr_srv_winsys_get_heaps_info()
549 heaps->general_heap = &srv_ws->general_heap.base; in pvr_srv_winsys_get_heaps_info()
550 heaps->pds_heap = &srv_ws->pds_heap.base; in pvr_srv_winsys_get_heaps_info()
551 heaps->transfer_3d_heap = &srv_ws->transfer_3d_heap.base; in pvr_srv_winsys_get_heaps_info()
552 heaps->usc_heap = &srv_ws->usc_heap.base; in pvr_srv_winsys_get_heaps_info()
553 heaps->vis_test_heap = &srv_ws->vis_test_heap.base; in pvr_srv_winsys_get_heaps_info()
556 heaps->rgn_hdr_heap = &srv_ws->rgn_hdr_heap.base; in pvr_srv_winsys_get_heaps_info()
558 heaps in pvr_srv_winsys_get_heaps_info()
544 pvr_srv_winsys_get_heaps_info(struct pvr_winsys *ws, struct pvr_winsys_heaps *heaps) pvr_srv_winsys_get_heaps_info() argument
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/third_party/mesa3d/src/imagination/vulkan/
H A Dpvr_query.c75 device->heaps.vis_test_heap, in pvr_CreateQueryPool()
84 device->heaps.vis_test_heap, in pvr_CreateQueryPool()
H A Dpvr_job_context.c230 device->heaps.pds_heap, in pvr_render_job_pt_programs_setup()
473 device->heaps.pds_heap, in pvr_ctx_sr_programs_setup()
495 device->heaps.usc_heap->base_addr.addr; in pvr_ctx_sr_programs_setup()
521 device->heaps.usc_heap->base_addr.addr; in pvr_ctx_sr_programs_setup()
653 device->heaps.general_heap, in pvr_render_ctx_switch_init()
662 device->heaps.general_heap, in pvr_render_ctx_switch_init()
864 device->heaps.general_heap, in pvr_render_ctx_create()
1113 device->heaps.general_heap, in pvr_compute_ctx_create()
H A Dpvr_device.c415 /* Setup available memory heaps and types */ in pvr_physical_device_init()
1343 device->heaps.general_heap, in pvr_device_init_compute_idfwdf_state()
1352 device->heaps.general_heap, in pvr_device_init_compute_idfwdf_state()
1627 device->ws->ops->get_heaps_info(device->ws, &device->heaps); in pvr_CreateDevice()
1819 const uint64_t alignment = device->heaps.general_heap->page_size; in pvr_AllocateMemory()
2001 size + (offset & (device->heaps.general_heap->page_size - 1)); in pvr_bind_memory()
2018 vma = device->ws->ops->heap_alloc(device->heaps.general_heap, in pvr_bind_memory()
2208 device->heaps.usc_heap, in pvr_gpu_upload_usc()
2271 device->heaps.pds_heap, in pvr_gpu_upload_pds()
2283 device->heaps in pvr_gpu_upload_pds()
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H A Dpvr_csb.c141 csb->device->heaps.general_heap, in pvr_csb_buffer_extend()
H A Dpvr_job_render.c239 device->heaps.general_heap, in pvr_free_list_create()
432 device->heaps.general_heap, in pvr_rt_vheap_rtc_data_init()
522 device->heaps.general_heap, in pvr_rt_tpc_data_init()
635 device->heaps.general_heap, in pvr_rt_mta_mlist_data_init()
698 device->heaps.rgn_hdr_heap, in pvr_rt_rgn_headers_data_init()
H A Dpvr_cmd_buffer.c263 device->heaps.general_heap, in pvr_cmd_buffer_upload_tables()
274 device->heaps.general_heap, in pvr_cmd_buffer_upload_tables()
327 device->heaps.general_heap, in pvr_cmd_buffer_upload_general()
2613 cmd_buffer->device->heaps.pds_heap, in pvr_setup_vertex_buffers()
2702 cmd_buffer->device->heaps.pds_heap->base_addr.addr; in pvr_setup_vertex_buffers()
2730 cmd_buffer->device->heaps.pds_heap, in pvr_setup_descriptor_mappings()
2927 cmd_buffer->device->heaps.pds_heap->base_addr.addr; in pvr_setup_descriptor_mappings()
4127 cmd_buffer->device->heaps.general_heap, in pvr_emit_ppp_state()
H A Dpvr_private.h258 struct pvr_winsys_heaps heaps; member
H A Dpvr_pipeline.c625 device->heaps.general_heap, in pvr_pds_descriptor_program_setup_buffers()
H A Dpvr_descriptor_set.c1171 device->heaps.general_heap, in pvr_descriptor_set_create()
/third_party/mesa3d/src/microsoft/vulkan/
H A Ddzn_descriptor_set.c1092 dzn_descriptor_heap_write_sampler_desc(&set->pool->heaps[type], in dzn_descriptor_set_write_sampler_desc()
1171 dzn_descriptor_heap_write_image_view_desc(&set->pool->heaps[type], in dzn_descriptor_set_write_image_view_desc()
1177 dzn_descriptor_heap_write_image_view_desc(&set->pool->heaps[type], in dzn_descriptor_set_write_image_view_desc()
1213 dzn_descriptor_heap_write_buffer_view_desc(&set->pool->heaps[type], in dzn_descriptor_set_write_buffer_view_desc()
1219 dzn_descriptor_heap_write_buffer_view_desc(&set->pool->heaps[type], in dzn_descriptor_set_write_buffer_view_desc()
1252 dzn_descriptor_heap_write_buffer_desc(&set->pool->heaps[type], in dzn_descriptor_set_write_buffer_desc()
1257 dzn_descriptor_heap_write_buffer_desc(&set->pool->heaps[type], in dzn_descriptor_set_write_buffer_desc()
1339 dzn_descriptor_heap_finish(&pool->heaps[type]); in dzn_descriptor_pool_destroy()
1404 dzn_descriptor_heap_init(&pool->heaps[type], device, type, pool->desc_count[type], false); in dzn_descriptor_pool_create()
1424 pool->heaps[typ in dzn_descriptor_pool_defragment_heap()
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H A Ddzn_cmd_buffer.c2287 desc_state->heaps[D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV], in dzn_cmd_buffer_update_heaps()
2288 desc_state->heaps[D3D12_DESCRIPTOR_HEAP_TYPE_SAMPLER] in dzn_cmd_buffer_update_heaps()
2323 &set->pool->heaps[type], set->heap_offsets[type], in dzn_cmd_buffer_update_heaps()
2354 if (new_heaps[D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV] != cmdbuf->state.heaps[D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV] || in dzn_cmd_buffer_update_heaps()
2355 new_heaps[D3D12_DESCRIPTOR_HEAP_TYPE_SAMPLER] != cmdbuf->state.heaps[D3D12_DESCRIPTOR_HEAP_TYPE_SAMPLER]) { in dzn_cmd_buffer_update_heaps()
2364 for (unsigned h = 0; h < ARRAY_SIZE(cmdbuf->state.heaps); h++) in dzn_cmd_buffer_update_heaps()
2365 cmdbuf->state.heaps[h] = new_heaps[h]; in dzn_cmd_buffer_update_heaps()
3183 if (heap != cmdbuf->state.heaps[D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV]) { in dzn_CmdBlitImage2()
3184 ID3D12DescriptorHeap * const heaps[] = { heap->heap }; in dzn_CmdBlitImage2() local
3185 cmdbuf->state.heaps[D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UA in dzn_CmdBlitImage2()
3227 ID3D12DescriptorHeap * const heaps[] = { heap->heap }; dzn_CmdResolveImage2() local
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H A Ddzn_private.h340 struct dzn_descriptor_heap *heaps[NUM_POOL_TYPES]; member
484 struct dzn_descriptor_heap *heaps[NUM_POOL_TYPES]; member
595 struct dzn_descriptor_heap heaps[NUM_POOL_TYPES]; member
/third_party/skia/third_party/externals/dawn/src/dawn_native/d3d12/
H A DResidencyManagerD3D12.cpp228 "Evicting resident heaps to free memory")); in EnsureCanMakeResident()
234 // Given a list of heaps that are pending usage, this function will estimate memory needed,
235 // evict resources until enough space is available, then make resident any heaps scheduled for
237 MaybeError ResidencyManager::EnsureHeapsAreResident(Heap** heaps, size_t heapCount) { in EnsureHeapsAreResident() argument
249 Heap* heap = heaps[i]; in EnsureHeapsAreResident()
270 // If we submit a command list to the GPU, we must ensure that heaps referenced by that in EnsureHeapsAreResident()
H A DResidencyManagerD3D12.h39 MaybeError EnsureHeapsAreResident(Heap** heaps, size_t heapCount);
/third_party/mesa3d/src/intel/vulkan/
H A Danv_device.c425 /* We can create 2 or 3 different heaps when we have local memory in anv_physical_device_init_heaps()
431 device->memory.heaps[0] = (struct anv_memory_heap) { in anv_physical_device_init_heaps()
440 device->memory.heaps[1] = (struct anv_memory_heap) { in anv_physical_device_init_heaps()
450 device->memory.heaps[2] = (struct anv_memory_heap) { in anv_physical_device_init_heaps()
472 /* This memory type either comes from heaps[0] if there is only in anv_physical_device_init_heaps()
473 * mappable vram region, or from heaps[2] if there is both mappable & in anv_physical_device_init_heaps()
480 device->memory.heaps[0] = (struct anv_memory_heap) { in anv_physical_device_init_heaps()
499 device->memory.heaps[0] = (struct anv_memory_heap) { in anv_physical_device_init_heaps()
2748 .size = physical_device->memory.heaps[i].size, in anv_GetPhysicalDeviceMemoryProperties()
2749 .flags = physical_device->memory.heaps[ in anv_GetPhysicalDeviceMemoryProperties()
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/third_party/skia/src/gpu/d3d/
H A DGrD3DCommandList.cpp581 ID3D12DescriptorHeap* heaps[2] = { in setDescriptorHeaps() local
586 fCommandList->SetDescriptorHeaps(2, heaps); in setDescriptorHeaps()
/third_party/mesa3d/src/imagination/vulkan/winsys/
H A Dpvr_winsys.h410 struct pvr_winsys_heaps *heaps);
/third_party/mesa3d/src/amd/vulkan/
H A Dradv_device.c200 device->heaps = 0; in radv_physical_device_init_mem_types()
217 device->heaps |= RADV_HEAP_VRAM; in radv_physical_device_init_mem_types()
226 device->heaps |= RADV_HEAP_GTT; in radv_physical_device_init_mem_types()
235 device->heaps |= RADV_HEAP_VRAM_VIS; in radv_physical_device_init_mem_types()
2690 /* For all memory heaps, the computation of budget is as follow: in radv_get_memory_budget_properties()
2700 /* On APUs, the driver exposes fake heaps to the application because usually the carveout is in radv_get_memory_budget_properties()
2704 assert(device->heaps == (RADV_HEAP_GTT | RADV_HEAP_VRAM_VIS)); in radv_get_memory_budget_properties()
2725 /* Compute the total free space that can be allocated for this process accross all heaps. */ in radv_get_memory_budget_properties()
2743 unsigned mask = device->heaps; in radv_get_memory_budget_properties()
2756 if (!(device->heaps in radv_get_memory_budget_properties()
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H A Dradv_private.h319 unsigned heaps; member
/third_party/mesa3d/src/gallium/drivers/zink/
H A Dzink_screen.c349 enum zink_heap heaps[] = { in get_smallest_buffer_heap() local
356 for (unsigned i = 0; i < ARRAY_SIZE(heaps); i++) { in get_smallest_buffer_heap()

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