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Searched refs:fs1 (Results 1 - 24 of 24) sorted by relevance

/third_party/ffmpeg/libavfilter/x86/
H A Dvf_ssim.asm191 ; m1 = fs1, m2 = fs2, m3 = fss, m4 = fs12
194 pmulld m5, m1, m2 ; fs1 * fs2
195 pmulld m1, m1 ; fs1 * fs1
201 ; m1 = fs1 * fs1, m2 = fs2 * fs2, m3 = variance, m4 = covariance, m5 = fs1 * fs2
203 paddd m5, m5 ; 2 * fs1 * fs2
204 paddd m1, m2 ; fs1 * fs1
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/third_party/ffmpeg/tests/
H A Dtiny_ssim.c89 type fs1 = s1; in ssim_end1() local
93 type vars = fss*64 - fs1*fs1 - fs2*fs2; in ssim_end1()
94 type covar = fs12*64 - fs1*fs2; in ssim_end1()
95 return (float)(2*fs1*fs2 + ssim_c1) * (float)(2*covar + ssim_c2) in ssim_end1()
96 / ((float)(fs1*fs1 + fs2*fs2 + ssim_c1) * (float)(vars + ssim_c2)); in ssim_end1()
/third_party/node/deps/v8/src/diagnostics/riscv64/
H A Ddisasm-riscv64.cc1078 Format(instr, "fadd.s 'fd, 'fs1, 'fs2"); in DecodeRFPType()
1081 Format(instr, "fsub.s 'fd, 'fs1, 'fs2"); in DecodeRFPType()
1084 Format(instr, "fmul.s 'fd, 'fs1, 'fs2"); in DecodeRFPType()
1087 Format(instr, "fdiv.s 'fd, 'fs1, 'fs2"); in DecodeRFPType()
1090 Format(instr, "fsqrt.s 'fd, 'fs1"); in DecodeRFPType()
1096 Format(instr, "fmv.s 'fd, 'fs1"); in DecodeRFPType()
1098 Format(instr, "fsgnj.s 'fd, 'fs1, 'fs2"); in DecodeRFPType()
1102 Format(instr, "fneg.s 'fd, 'fs1"); in DecodeRFPType()
1104 Format(instr, "fsgnjn.s 'fd, 'fs1, 'fs2"); in DecodeRFPType()
1108 Format(instr, "fabs.s 'fd, 'fs1"); in DecodeRFPType()
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/third_party/ffmpeg/libavfilter/
H A Dvf_ssim.c167 int64_t fs1 = s1; in ssim_end1x() local
171 int64_t vars = fss * 64 - fs1 * fs1 - fs2 * fs2; in ssim_end1x()
172 int64_t covar = fs12 * 64 - fs1 * fs2; in ssim_end1x()
174 return (float)(2 * fs1 * fs2 + ssim_c1) * (float)(2 * covar + ssim_c2) in ssim_end1x()
175 / ((float)(fs1 * fs1 + fs2 * fs2 + ssim_c1) * (float)(vars + ssim_c2)); in ssim_end1x()
183 int fs1 = s1; in ssim_end1() local
187 int vars = fss * 64 - fs1 * fs1 in ssim_end1()
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/third_party/node/deps/v8/src/execution/riscv64/
H A Dsimulator-riscv64.cc801 float fs1 = get_fpu_register_float(rs1_reg()); \
808 double fs1 = get_fpu_register_double(rs1_reg()); \
858 double fs1 = static_cast<double>(get_fpu_register_float(rs1_reg())); \
926 auto alu_out = fn(fs1, vs2); \
928 if (std::isnan(alu_out) || std::isnan(fs1) || std::isnan(vs2)) { \
930 if (isSnan(alu_out) || isSnan(fs1) || isSnan(vs2)) \
975 float fs1 = get_fpu_register_float(rs1_reg()); \
982 float fs1 = get_fpu_register_float(rs1_reg()); \
6153 USE(fs1);
6159 USE(fs1);
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H A Dsimulator-riscv64.h282 fs1, enumerator
/third_party/musl/src/setjmp/riscv64/
H A Dlongjmp.S27 fld fs1, 120(a0)
H A Dsetjmp.S27 fsd fs1, 120(a0)
/third_party/musl/src/setjmp/riscv32/
H A Dlongjmp.S27 fld fs1, 64(a0)
H A Dsetjmp.S27 fsd fs1, 64(a0)
/third_party/musl/src/setjmp/loongarch64/
H A Dsetjmp.S25 fst.d $fs1, $a0, 112
H A Dlongjmp.S22 fld.d $fs1, $a0, 112
/third_party/node/deps/v8/src/codegen/riscv64/
H A Dreglist-riscv64.h40 const DoubleRegList kCalleeSavedFPU = {fs0, fs1, fs2, fs3, fs4, fs5,
H A Dassembler-riscv64.h740 void vfmv_vf(VRegister vd, FPURegister fs1, MaskType mask = NoMask);
781 void name##_vf(VRegister vd, VRegister vs2, FPURegister fs1, \
785 void name##_wf(VRegister vd, VRegister vs2, FPURegister fs1, \
793 void name##_vf(VRegister vd, FPURegister fs1, VRegister vs2, \
1671 void GenInstrV(uint8_t funct6, Opcode opcode, VRegister vd, FPURegister fs1,
H A Dregister-riscv64.h46 V(fs0) V(fs1) V(fa0) V(fa1) V(fa2) V(fa3) V(fa4) V(fa5) \
H A Dassembler-riscv64.cc1200 FPURegister fs1, VRegister vs2, MaskType mask) { in GenInstrV()
1204 ((fs1.code() & 0x1F) << kRvvRs1Shift) | in GenInstrV()
2631 void Assembler::name##_vf(VRegister vd, VRegister vs2, FPURegister fs1, \
2633 GenInstrV(funct6, OP_FVF, vd, fs1, vs2, mask); \
2637 void Assembler::name##_wf(VRegister vd, VRegister vs2, FPURegister fs1, \
2639 GenInstrV(funct6, OP_FVF, vd, fs1, vs2, mask); \
2649 void Assembler::name##_vf(VRegister vd, FPURegister fs1, VRegister vs2, \
2651 GenInstrV(funct6, OP_FVF, vd, fs1, vs2, mask); \
2660 void Assembler::vfmv_vf(VRegister vd, FPURegister fs1, MaskType mask) { in vfmv_vf() argument
2661 GenInstrV(VMV_FUNCT6, OP_FVF, vd, fs1, v in vfmv_vf()
1199 GenInstrV(uint8_t funct6, Opcode opcode, VRegister vd, FPURegister fs1, VRegister vs2, MaskType mask) GenInstrV() argument
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/third_party/libunwind/libunwind/src/riscv/
H A Dsetcontext.S43 LOAD_FP fs1, FREG(9)
H A Dgetcontext.S67 STORE_FP fs1, FREG(9)
/third_party/node/deps/v8/src/compiler/
H A Dc-linkage.cc129 fs0, fs1, fs2, fs3, fs4, fs5, fs6, fs7, fs8, fs9, fs10, fs11
/third_party/vk-gl-cts/external/openglcts/modules/common/
H A DglcUniformBlockTests.cpp593 std::string fs1("precision highp float;\n" in iterate()
612 if (!Link(vs1, fs1) || !Link(vs2, fs2)) in iterate()
699 std::string fs1("precision highp float;\n" in iterate()
707 if (!Test(vs1, fs1, GL_FALSE)) in iterate()
/third_party/skia/third_party/externals/dng_sdk/source/
H A Ddng_exif.cpp4242 real64 fs1 = fLensInfo [2].As_real64 (); in PostParse() local
4245 if (fs1 >= 1.0 && fs2 >= 1.0 && fs2 >= fs1) in PostParse()
4248 real64 av1 = FNumberToApertureValue (fs1); in PostParse()
/third_party/elfutils/tests/
H A Drun-allregs.sh2883 41: fs1 (fs1), float 64 bits
/third_party/vk-gl-cts/external/openglcts/modules/gl/
H A Dgl4cShaderStorageBufferObjectTests.cpp5223 std::string fs1("buffer Buf { float x; } b;\n" in Run()
5228 if (Link(vs1, fs1)) in Run()
/third_party/vk-gl-cts/external/openglcts/modules/gles31/
H A Des31cShaderStorageBufferObjectTests.cpp4965 std::string fs1("buffer Buf { float x; } b;\n" in Run()
4970 if (Link(vs1, fs1)) in Run()

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