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Searched refs:frsqrte (Results 1 - 19 of 19) sorted by relevance

/third_party/vixl/test/aarch64/
H A Dtest-cpu-features-aarch64.cc3353 TEST_FP_NEON(frsqrte_0, frsqrte(v0.V2S(), v1.V2S()))
3354 TEST_FP_NEON(frsqrte_1, frsqrte(v0.V4S(), v1.V4S()))
3355 TEST_FP_NEON(frsqrte_2, frsqrte(v0.V2D(), v1.V2D()))
3356 TEST_FP_NEON(frsqrte_3, frsqrte(s0, s1))
3357 TEST_FP_NEON(frsqrte_4, frsqrte(d0, d1))
3722 TEST_FP_NEON_NEONHALF(frsqrte_0, frsqrte(v0.V4H(), v1.V4H()))
3723 TEST_FP_NEON_NEONHALF(frsqrte_1, frsqrte(v0.V8H(), v1.V8H()))
3724 TEST_FP_NEON_NEONHALF(frsqrte_2, frsqrte(h0, h1))
H A Dtest-trace-aarch64.cc584 __ frsqrte(d21, d10); in GenerateTestSequenceFP()
585 __ frsqrte(s17, s25); in GenerateTestSequenceFP()
2726 __ frsqrte(v23.V2D(), v5.V2D()); in GenerateTestSequenceNEONFP()
2727 __ frsqrte(v9.V2S(), v7.V2S()); in GenerateTestSequenceNEONFP()
2728 __ frsqrte(v3.V4S(), v9.V4S()); in GenerateTestSequenceNEONFP()
H A Dtest-simulator-aarch64.cc4903 DEFINE_TEST_NEON_2SAME_FP_FP16(frsqrte, Basic)
4944 DEFINE_TEST_NEON_2SAME_FP_FP16_SCALAR(frsqrte, Basic)
H A Dtest-disasm-sve-aarch64.cc2006 COMPARE(frsqrte(z27.VnH(), z14.VnH()), "frsqrte z27.h, z14.h"); in TEST()
2007 COMPARE(frsqrte(z27.VnS(), z14.VnS()), "frsqrte z27.s, z14.s"); in TEST()
2008 COMPARE(frsqrte(z27.VnD(), z14.VnD()), "frsqrte z27.d, z14.d"); in TEST()
H A Dtest-api-movprfx-aarch64.cc632 __ frsqrte(z6.VnS(), z12.VnS()); in TEST()
/third_party/node/deps/v8/src/codegen/arm64/
H A Dassembler-arm64.h1426 void frsqrte(const VRegister& vd, const VRegister& vn);
H A Dmacro-assembler-arm64.h289 V(frsqrte, Frsqrte) \
H A Dassembler-arm64.cc2889 V(frsqrte, NEON_FRSQRTE, NEON_FRSQRTE_scalar) \
/third_party/vixl/src/aarch64/
H A Dsimulator-aarch64.cc7166 frsqrte(fpf, rd, rn); in Simulator()
7302 frsqrte(fpf, rd, rn); in Simulator()
8807 frsqrte(fpf, rd, rn); in Simulator()
8900 frsqrte(fpf, rd, rn); in Simulator()
10924 frsqrte(vform, zd, zn); in Simulator()
H A Dassembler-aarch64.h3297 void frsqrte(const VRegister& vd, const VRegister& vn);
4470 void frsqrte(const ZRegister& zd, const ZRegister& zn);
H A Dsimulator-aarch64.h4714 LogicVRegister frsqrte(VectorFormat vform,
H A Dmacro-assembler-aarch64.h3039 V(frsqrte, Frsqrte) \
4840 frsqrte(zd, zn); in Frsqrte()
H A Dassembler-aarch64.cc3883 V(frsqrte, NEON_FRSQRTE, NEON_FRSQRTE_scalar, NEON_FRSQRTE_H_scalar) \
H A Dassembler-sve-aarch64.cc2008 void Assembler::frsqrte(const ZRegister& zd, const ZRegister& zn) { in frsqrte() function in vixl::aarch64::Assembler
H A Dlogic-aarch64.cc6182 LogicVRegister Simulator::frsqrte(VectorFormat vform,
/third_party/node/deps/v8/src/codegen/ppc/
H A Dconstants-ppc.h1945 V(frsqrte, FRSQRTE, 0xFC000034) \
/third_party/node/deps/v8/src/execution/arm64/
H A Dsimulator-arm64.h2152 LogicVRegister frsqrte(VectorFormat vform, LogicVRegister dst,
H A Dsimulator-arm64.cc4118 frsqrte(fpf, rd, rn);
5398 frsqrte(fpf, rd, rn);
H A Dsimulator-logic-arm64.cc3966 LogicVRegister Simulator::frsqrte(VectorFormat vform, LogicVRegister dst, in frsqrte() function in v8::internal::Simulator

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