| /third_party/skia/third_party/externals/dawn/src/common/ |
| H A D | Math.cpp | 129 float Float16ToFloat32(uint16_t fp16) { in Float16ToFloat32() argument
130 uint32_t tmp = (fp16 & 0x7fff) << 13 | (fp16 & 0x8000) << 16; in Float16ToFloat32()
135 bool IsFloat16NaN(uint16_t fp16) { in IsFloat16NaN() argument
136 return (fp16 & 0x7FFF) > 0x7C00; in IsFloat16NaN()
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| H A D | Math.h | 89 float Float16ToFloat32(uint16_t fp16);
90 bool IsFloat16NaN(uint16_t fp16);
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| /third_party/mesa3d/src/panfrost/bifrost/ |
| H A D | bi_opt_message_preload.c | 107 .fp16 = (I->register_format == BI_REGISTER_FORMAT_F16), in bi_opt_message_preload()
116 .fp16 = (I->op == BI_OPCODE_VAR_TEX_F16), in bi_opt_message_preload()
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| H A D | bifrost_compile.c | 300 * fp16 input: in bi_varying_src0_for_barycentric()
460 * consumes 16 bytes (TODO: fp16, partial vectors).
3122 bi_emit_texc_lod_88(bi_builder *b, bi_index lod, bool fp16) in bi_emit_texc_lod_88() argument
3127 float x = fp16 ? _mesa_half_to_float(raw) : uif(raw); in bi_emit_texc_lod_88()
3138 fp16 ? bi_half(lod, false) : lod, in bi_emit_texc_lod_88()
4109 * 16 fp16 varying components per cycle or fetch two texels per cycle. in bi_count_preload_cost()
4120 cost += (msg.num_components * (msg.fp16 ? 1 : 2)); in bi_count_preload_cost()
4778 * idea, as fp16 texture coordinates are not supported by the hardware and are
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| /third_party/mesa3d/src/asahi/compiler/ |
| H A D | agx_optimizer.c | 128 bool fp16 = (def->dest[0].size == AGX_SIZE_16); in agx_optimizer_inline_imm() local
129 assert(fp16 || (def->dest[0].size == AGX_SIZE_32)); in agx_optimizer_inline_imm()
131 float f = fp16 ? _mesa_half_to_float(def->imm) : uif(def->imm); in agx_optimizer_inline_imm()
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| /third_party/mesa3d/src/panfrost/bifrost/valhall/ |
| H A D | va_lower_constants.c | 80 uint16_t fp16 = _mesa_float_to_half(uif(value)); in va_demote_constant_fp16() local
83 if (fui(_mesa_half_to_float(fp16)) == value) in va_demote_constant_fp16()
84 return va_lut_index_16(fp16); in va_demote_constant_fp16()
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| /third_party/mesa3d/src/freedreno/vulkan/ |
| H A D | tu_util.h | 308 uint64_t fp16;
356 pack_int16((uint32_t*) &bcolor->fp16, val->uint32);
363 PACK_F(fp16, r16g16b16a16_float);
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| /third_party/vk-gl-cts/modules/gles2/accuracy/ |
| H A D | es2aVaryingInterpolationTests.cpp | 130 tcu::Float16 fp16(val); in isValidFloat()
131 return !fp16.isDenorm() && !fp16.isInf() && !fp16.isNaN(); in isValidFloat()
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| /third_party/vk-gl-cts/modules/gles3/accuracy/ |
| H A D | es3aVaryingInterpolationTests.cpp | 132 tcu::Float16 fp16(val); in isValidFloat()
133 return !fp16.isDenorm() && !fp16.isInf() && !fp16.isNaN(); in isValidFloat()
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| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | si_debug_options.h | 16 OPT_BOOL(fp16, false, "Enable FP16 for mediump.")
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| H A D | si_get.c | 501 return sscreen->info.gfx_level >= GFX8 && sscreen->options.fp16; in si_get_shader_param()
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| /third_party/mesa3d/src/compiler/nir/ |
| H A D | nir_lower_fp16_conv.c | 186 nir_ssa_def *fp16 = nir_if_phi(b, inf_nanfp16, finite_or_overflowed_fp16); in float_to_half_impl() local
188 return nir_u2u16(b, nir_ior(b, fp16, nir_ushr(b, sign, nir_imm_int(b, 16)))); in float_to_half_impl()
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| /third_party/mesa3d/src/compiler/clc/ |
| H A D | clc.h | 53 bool fp16; member
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| /third_party/mesa3d/src/panfrost/lib/ |
| H A D | pan_shader.h | 147 enum mali_message_preload_register_format regfmt = msg->fp16 ? in pan_pack_message_preload()
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| /third_party/vk-gl-cts/external/vulkancts/modules/vulkan/texture/ |
| H A D | vktSampleVerifierUtil.cpp | 623 const Float16 fp16(*(const deUint16*) fp16Ptr);
624 const Interval fpInterval = internalFormat->roundOut(Interval(fp16.asDouble()), false);
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| H A D | vktTextureFilteringExplicitLodTests.cpp | 75 de::SharedPtr<tcu::FloatFormat> fp16 (new tcu::FloatFormat(-14, 15, std::max(0, 10 + fpPrecisionDelta), false, tcu::YES)); in getPrecision()
96 floatFormats.push_back(fp16); in getPrecision()
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| /third_party/vk-gl-cts/external/vulkancts/modules_no_buildgn/vulkan/texture/ |
| H A D | vktSampleVerifierUtil.cpp | 623 const Float16 fp16(*(const deUint16*) fp16Ptr);
624 const Interval fpInterval = internalFormat->roundOut(Interval(fp16.asDouble()), false);
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| H A D | vktTextureFilteringExplicitLodTests.cpp | 75 de::SharedPtr<tcu::FloatFormat> fp16 (new tcu::FloatFormat(-14, 15, std::max(0, 10 + fpPrecisionDelta), false, tcu::YES)); in getPrecision()
96 floatFormats.push_back(fp16); in getPrecision()
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| /third_party/mesa3d/src/panfrost/util/ |
| H A D | pan_ir.h | 243 bool fp16; member
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| H A D | fd5_emit.c | 165 uint16_t fp16[4]; member
176 srgb[4]; /* appears to duplicate fp16[], but clamped, used for srgb */
277 e->fp16[cd] = clamped; in setup_border_colors()
284 e->fp16[c] = _mesa_float_to_half(f); in setup_border_colors()
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| /third_party/mesa3d/src/intel/compiler/ |
| H A D | intel_clc.c | 435 .fp16 = true, in main()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
| H A D | fd6_emit.c | 62 uint16_t fp16[4]; member
72 srgb[4]; /* appears to duplicate fp16[], but clamped, used for srgb */
182 e->fp16[cd] = clamped; in setup_border_colors()
189 e->fp16[c] = _mesa_float_to_half(f); in setup_border_colors()
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| /third_party/mesa3d/src/amd/compiler/ |
| H A D | aco_optimizer.cpp | 1770 bool fp16 = instr->opcode == aco_opcode::v_mul_f16; in label_instruction()
1775 (instr->operands[!i].constantEquals(fp16 ? 0x3c00 : 0x3f800000) || /* 1.0 */ in label_instruction()
1776 instr->operands[!i].constantEquals(fp16 ? 0xbc00 : 0xbf800000u))) { /* -1.0 */ in label_instruction()
1777 bool neg1 = instr->operands[!i].constantEquals(fp16 ? 0xbc00 : 0xbf800000u); in label_instruction()
1798 (fp16 ? 0x4000 : 0x40000000)) { /* 2.0 */ in label_instruction()
1801 (fp16 ? 0x4400 : 0x40800000)) { /* 4.0 */ in label_instruction()
1804 (fp16 ? 0x3800 : 0x3f000000)) { /* 0.5 */ in label_instruction()
1807 (!(fp16 ? ctx.fp_mode.preserve_signed_zero_inf_nan16_64 in label_instruction()
3939 /* don't promote fp16 to fp32 or remove fp32->fp16 in combine_instruction()
[all...] |
| /third_party/node/deps/v8/src/execution/mips64/ |
| H A D | simulator-mips64.cc | 6401 #define EXTRACT_FLOAT16_SIGN(fp16) (fp16 >> 15)
6402 #define EXTRACT_FLOAT16_EXP(fp16) (fp16 >> 10 & 0x1F)
6403 #define EXTRACT_FLOAT16_FRAC(fp16) (fp16 & 0x3FF)
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| /third_party/node/deps/v8/src/execution/mips/ |
| H A D | simulator-mips.cc | 6108 #define EXTRACT_FLOAT16_SIGN(fp16) (fp16 >> 15)
6109 #define EXTRACT_FLOAT16_EXP(fp16) (fp16 >> 10 & 0x1F)
6110 #define EXTRACT_FLOAT16_FRAC(fp16) (fp16 & 0x3FF)
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